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    請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/69501


    題名: 氮化鎵場效電晶體之動態特性與表面處理研究;Study of Dynamic Characteristics and Surface Treatments of GaN Field Effect Transistors
    作者: 高維新;Kao,Wei-xin
    貢獻者: 電機工程學系
    關鍵詞: 氮化鎵;電流回復;GaN;current recovery
    日期: 2016-01-26
    上傳時間: 2016-03-17 20:47:09 (UTC+8)
    出版者: 國立中央大學
    摘要: 減少能源消耗是現今的一大課題,在電子電路中,功率元件所消耗的能量居整體大宗,因此,研發氮化鎵功率元件取代矽製功率元件在電源、馬達驅動、不斷電系統、功率因子校正等處的角色、達到減少功率消耗是當務之急。而對於應用在開關電路的氮化鎵功率電晶體,動態電阻是尚未被完全釐清的問題。
    動態電阻肇因於元件內部的缺陷捕捉自由電荷致使導通電流下降。本研究使用成長於矽基板的氮化鋁鎵/氮化鎵異質結構製作高速電子遷移率與金氧半場效電晶體進行研究。為了找出影響動態特性的因子,此處對於氮化鋁鎵/氮化鎵MIS-HEMTs設計了不同的界面處理方法含:一、未處理,二、臨場氫氣/氬氣電漿處理,三、鹽酸水溶液處理,四、鹽酸水溶液後再以臨場氫氣/氬氣電漿處理。結果無法從遲滯、界面能態密度等量測結果中找出其與動態電阻的關聯性,這表示有其他影響動態電阻的因素存在。
    為此設計不同偏壓條件與偏壓時間的量測,並對氮化鋁鎵/氮化鎵HEMTs的電流回復曲線進行分析,結果發現在相同的偏壓條件下,偏壓時間越長會使陷捕電子的脫離時間常數越長。這表示電子若需從最終的陷捕位置成為自由電子,必須經過多次的脫離與再陷捕,使其脫離時間常數加長。當進行基板施加負偏壓的背閘極量測時,負偏壓越大會使陷捕電子越靠近2DEG通道,因此電子脫離時間常數越小。在零偏壓情況下,缺陷內陷捕電子數量的多寡,會影響動態量測後電流回復曲線的趨勢。缺陷能階本身,不應被視為唯一會影響動態電阻優劣的變數,還必須將陷捕電子位置納入考量才能更正確地解析電流回復趨勢。基於這種理解之上,將能建立解析動態電阻的模型,並預測不同能階、不同位置的缺陷在不同偏壓條件與偏壓時間之下的動態電阻行為,藉此設計元件結構與佈局。
    ;Reducing energy consumption is a major issue today. In the electronic circuits, most of the energy is consumed by power devices. Therefore, to replace silicon power devices by GaN power devices is a priority in the power systems, electric vehicles, UPS systems, power factor correction, etc. For GaN MIS-HEMTs applied in switching circuits, the mechanism of dynamic on-resistance is a problem not yet been fully clarified.
    Dynamic on-resistance prompted by the charges trapped by defects so that the conduction current decreases. In this study, GaN-on-Si HEMT wafer was used and Al0.26Ga0.74N/GaN HEMTs and MIS-HEMTs was fabricated. In order to identify the impact of the dynamic characteristics of factors, where the MIS-HEMTs designed different interface treatments of processing: (i) untreated, (ii) in-situ hydrogen/argon plasma treatment, (iii) aqueous hydrochloric acid solution, and (iv) after an aqueous solution of hydrochloric acid with in-situ hydrogen/argon plasma treatment. No correlation was found between results of dynamic on-resistance and hysteresis or interface state density, which means existing other factors. level
    For analyzing the recovery of drain current after stress, different bias conditions and stress time was applied. It was found that under the same bias conditions, a longer stress time causes a longer emission time constant. This suggests that the trapped charges located far from 2DEG or electrode undergo repeated emission and trapping in recovery which increases the emission time constant. In the backgating measurement, when the negative bias is applied on substrate, a greater negative bias makes more electrons trapped near to 2DEG, therefore a shorter emission time constant was observed. The number of trapped charges under zero bias condition could change the trend of recovery of drain current seriously. According to the results, the location of trapped charges should be considered to be one of the most important factor to influence recovery curve of drain current. Based on this conclusion, the analysis of dynamic on-resistance and then the design of epitaxy or device process could be improved.
    顯示於類別:[電機工程研究所] 博碩士論文

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