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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/72359

    Title: 三維集成電路的發展與挑戰;The Development and Challenges of 3D IC
    Authors: 李牧民;Lee,Mu-Ming
    Contributors: 機械工程學系
    Keywords: 三維集成;三維集成封裝;三維集成電路;矽穿孔;中介層;3D integration;3D IC packing;3D IC;Through Silicon Via;TSV;Interposer
    Date: 2016-07-01
    Issue Date: 2016-10-13 14:49:40 (UTC+8)
    Publisher: 國立中央大學
    Abstract: 本論文呈現的是一個針對三維集成,包含三維集成封裝、
    ;This thesis presents a survey of 3D integration, including 3D IC packing, 3D IC integration and also a survey of 3D Integrated Circuits using Through Silicon Vias (TSV). 3D integration, packing, 3D IC Integrated Circuits and also TSV will be defined, the evolution of 2D IC’s to 3D IC’s and the rationale for moving to these systems will be given, and a whole overview of the construction and process of the 3D Integrated Circuit and TSV will be presented. This thesis also will give a detail caption about the interposer, which is the heart of 3D IC, and also the manufacturing process of the interposer. Lastly, the testing mechanism, application and challenges of 3D Integrated Circuits using TSVs will be discussed.
    Appears in Collections:[機械工程研究所] 博碩士論文

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