摘要: | 本論文為探討雙閘極氮化鋁鎵/氮化鎵 (AlGaN/GaN) 高電子遷移率電晶體之第二閘極佈局與元件電性研究,首先透過Silvaco TCAD進行元件模擬與基本電性觀察,實驗研究分為兩個部分,(1) 雙閘極結構元件;(2) 維持歐姆接觸尺寸,利用第二閘極長度改變通道寬度元件。實驗結果分別量測不同結構元件的直流電性、高頻特性與不同環境溫度條件下的特性,並與單閘極結構比較,觀察第二閘極佈局對於電晶體電性影響。 雙閘極結構元件,在閘極與第二閘極同時施予小於臨界電壓的偏壓時,閘極下方空乏區範圍較大,可以改善電晶體關閉時漏電流 (ID,off) 並使臨界電壓 (Vth) 向正電壓位移。此外,第二閘極施予0 V偏壓,可以使汲極在大偏壓條件下,閘極與汲極之間電場分布均勻,進而改善元件關閉時的崩潰電壓電性。變溫量測包含汲極電流 – 閘極電壓電性與汲極電流 – 汲極電壓電性,分別計算臨界電壓、最大轉導峰值、導通電流值、漏電流值、導通電阻值對應溫度係數。並藉由汲極電流 – 汲極電壓電性觀察各元件熱阻抗,熱阻抗分為低功率範圍與高功率範圍,而不論低、高功率範圍,雙閘極結構,且第二閘極為懸浮態元件都具有較佳的熱阻抗值,因此第二閘極有助於元件散熱。 延續雙閘極結構,維持歐姆接觸尺寸,利用第二閘極長度改變通道寬度元件。通道寬度設計與第二閘極長度呈現消長關係,通道寬度分別等於四分之三源極寬度、四分之二源極寬度和四分之一源極寬度,且第二閘極下方並無通道存在。此部分分為閘極與第二閘極連結元件和閘極與第二閘極未連結元件,不論閘極與第二閘極是否連結的元件,隨著通道寬度縮減,最大轉導峰值與導通電流密度呈現上升趨勢,次臨界擺幅與導通電阻則有改善,但漏電流密度也呈現上升趨勢,量測結果與Silvaco TCAD 3D結構模擬電性結果趨勢吻合。由於第二閘極佈局,使閘極總長度增加,高頻量測所得電流增益截止頻率與功率增益截止頻率都隨著通道寬度縮減而呈現劣化趨勢。元件變溫量測包含汲極電流 – 閘極電壓電性與汲極電流 – 汲極電壓電性,分別計算臨界電壓、最大轉導峰值、導通電流值、漏電流值、導通電阻值對應溫度係數,並藉由汲極電流 – 汲極電壓電性觀察各元件熱阻抗。熱阻抗分為低功率範圍與高功率範圍,而不論低、高功率範圍,隨著通道寬度縮減,熱阻抗值呈現下降趨勢,因此改變通道寬度有助於元件散熱。保持歐姆接觸寬度,改變閘極 - 汲極間通道寬度,並調變第二閘極長度結構元件,具有降低次臨界擺幅、導通電阻電性與熱阻抗等優點。 ;The electrical characteristics of AlGaN/GaN high-electron mobility transistors with the different layouts of the second gate are designed and investigated. First, Silvaco TCAD is used to simulate and investigate the electrical characteristics. The experimental study of devices include two parts, (1) device performance with dual gates structure; (2) device performance with the same size of the ohmic contact but varying the second gate length to adjust the 2DEG channel width. DC and high frequency measurements of different structural devices under the different temperatures conditions are measured and analyzed. In the first part, device with dual gates provide the larger depletion region under the gate metal, which can improve the leakage current ID, off and result in Vth shift. In addition, applying a bias voltage of 0 V to the second gate can make the electric field become uniform between gate and drain. Moreover, the temperature coefficients of the Vth, gm, max, ID, ID, off, and Ron at different temperatures conditions are performed and calculated. The values of thermal impedance are divided into low power range and high power range. Regardless of low and high power range, dual gates structure with floating second gate shows better thermal impedance. So the second gate structure could contribute to thermal dissipation. In the second part, devices with the same ohmic contact size (Wsource) but using the second gate length to adjust the 2DEG channel width is designed and characterized. The 2DEG channel width is designed to 3/4 Wsource, 1/2 Wsource and 1/4 Wsource. There are two structures: (Ⅰ) gate and second gate are connected, (Ⅱ) second gate is floating. With the reduction of the 2DEG channel width, the gm, max and ID show an increase trend. The leakage current also shows an increase trend. But the S.S and Ron are improved. The measurement results agree well with the simulation results of Silvaco TCAD DC characteristics. The thermal impedance decreases as the channel width is reduced. Therefore, changing the width of the channel could contribute to thermal dissipation of the device. |