以系統模擬探討 陶瓷基板製造之派工法則;Discussion of Dispatching Rules in Ceramic Substrate Manufacturing by System Simulation

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题名:	以系統模擬探討陶瓷基板製造之派工法則;Discussion of Dispatching Rules in Ceramic Substrate Manufacturing by System Simulation
作者:	黃進浩;Huang, Jin-Hao
贡献者:	工業管理研究所
关键词:	派工法則;系統模擬;陶瓷基板製造;Dispatching rules;System simulation;Ceramic substrate manufacturing
日期:	2019-08-19
上传时间:	2019-09-03 13:07:03 (UTC+8)
出版者:	國立中央大學
摘要:	從1970年代起，台灣開始著重於半導體產業的發展，至今，台灣的半導體產值佔了總台股的23%，根據工研院發表指出，在2004年半導體產值已經突破了新台幣一兆元，在2014年突破了新台幣兩兆元的好成績。台灣半導體產業已經發展的相當具有規模，且在全球供應鏈中，扮演了重要的角色，舉例來說，晶圓代工以及IC封裝產業為全球排名第一，IC設計為全球第二。半導體其實就是一些化合物以及元素，可經由一些特性來製造一些電路，進而解決一些較複雜的資訊問題。半導體產業鏈由三個部分組合而成，從IC設計到IC測試，分別在世界上佔有舉足輕重之地位。陶瓷基板就為半導體產業電路的一種，具有良好導熱性及耐熱性，也具有相當強的適應環境能力，所以處理程序也不盡相同，也因為這樣，作業流程相較於一般印刷電路板複雜許多，這時排程就扮演相當重要之角色。本文以個案公司零工式生產之陶瓷機板製造進行探討，利用系統模擬建構出個案公司零工式生產之陶瓷機板製造模型，首先會先將不同訂單給予不同的權重，接著將這些資料在模擬之中運行，藉此找出個案公司主要瓶頸工作站。針對瓶頸工作站提出半導體常用的派工以及派工組合，而在其他非瓶頸工作站中，則以EDD法則進行測試。首先本文會先根據平均流程時間輸出結果選用兩種較好派工法則，接著在選用平均延遲時間以及瓶頸工作站等待時間較小之法則，最後挑選出五種派工法則，且將這五種派工法則進行排名。經過實驗結果證實，本文第一優先選擇派工為FIFO+EDD法則，而第二優先選擇派工選擇為SRPT+EDD法則。在選取FIFO+EDD法則時，能夠使得平均延遲時間以及瓶頸站平均等待時間為最好而在選取SRPT+EDD法則能夠使得平均延遲時間以及瓶頸站平均等待時間排名為二。 ;Taiwan has focused on the development of the semiconductors manufacturing since 1970. Up to now, Output value of semiconductors manufacturing for 23% of the total Taiwan stocks. According to the Industrial Technology Research Institute statistics, the semiconductor output value has exceeded NT$1 trillion since 2004. The semiconductor output value has exceeded NT$2 trillion since 2014. Taiwanese semiconductors manufacturing has developed quite large scale and played an important role in the global supply chain. For example, wafer foundry and intergraded circuit package top of ranks in the world, and intergraded circuit design to ranks second in the world. In fact, semiconductor are chemical compositions and elements that can make electric circuit through its property can solve complicated information problems. Industry chain of semiconductors manufacturing consist of three parts. From intergraded circuit design to intergraded circuit testing play an important role in the world. Ceramic substrate is a kind of semiconductors manufacturing, which has good heat conduction, good heat tolerance and good acclimation. Owing to productive process is more complicated than Printed circuit board, scheduling needs to play an important role. The purpose of the study discusses a study of ceramic substrate manufacturing for job shop scheduling of the case company. Using system simulation to construct a ceramic substrate manufacturing model of the case company. For one thing, different orders are given different weights, and then the data run in the system simulation. Finally, to find out the main bottleneck workstation of the case company. For the bottleneck workstation use the common dispatching rules of the semiconductors manufacturing and combination of dispatching rules while in other non-bottleneck workstations that use the EDD dispatching rules for testing. First of all, the study based on the average flow time output that select two better dispatching rules, and then based on the average tardiness time and the waiting time of the bottleneck workstation that select five better dispatching rules. Finally, Five dispatching rules are ranked. The experimental results show that the first priority of the study is FIFO+EDD dispatching rules, and the second choice is SRPT+EDD dispatching rules. FIFO+EDD dispatching rules is selected, the tardiness time and the average waiting time of the bottleneck station can rank the first, while SRPT+EDD dispatching rules is selected, the tardiness time and the average waiting time of the bottleneck station can rank the second.
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