本論文研究主題為使用四元材料氮化鋁銦鎵/氮化鋁/氮化鎵成長於矽基板之磊晶片製作高電子遷移率電晶體，以台灣半導體研究中心的 I-line 光學步進機開發閘極微縮製程，利用蝕刻回填的技術來突破光學曝光機台的極限來維持低生產成本，讓元件特性得以應用於毫米波功率放大器。 文中詳述製作 0.25 μm T 型閘極元件之過程，利用蝕刻回填氮化矽之方式，成功將原 0.7 μm 之閘極足部微縮至 0.25 μm。此回填之 SiN 不僅具有微縮閘極線寬的功用，同時兼具鈍化層的作用，且能支撐閘極頭部避免傾倒提高量率。此 T 型閘極 AlInGaN/AlN/GaN HEMT 之零閘極偏壓汲極電流為 537 mA/mm，最大轉導可達 439 mS/mm，電流增益截止頻率可達 58 GHz，功率增益截止頻率可達 73 GHz。功率的結果在 28 GHz 的情況下得到 Pout 為 0.68 W/mm，PAE 為 5.92 %，在 6 GHz 時的 Pout 為 1.78 W/mm，PAE 為 26.93 %。 本論文亦詳述了使用 ICCAP 及 ADS 軟體，考慮此元件的製程設計、磊晶結構及基板，建立小訊號等效電路的方法，並從萃取出之小訊號參數分析其高頻特性與此元件之關係。;This study aims to fabricate deep sub-micron AlInGaN/AlN/GaN high electron mobility transistors grown on silicon substrate using i-line optical lithography processes. Using an i-line stepper from Taiwan Semiconductor Research Center and plasma-enhanced chemical vapor deposition (PECVD) SiNx backfill process, devices with gate length of 0.25 μm or less are fabricated for the application in millimeter wave power amplifiers. The fabrication process of the 0.25 μm T-gate devices is described as the following. The original 0.7 μm gate foot is successfully shrunk to 0.25 μm by etching the backfilled SiNx, which not only has the function of scaling gate length, but also supporting the gate head to avoid yield loss. Drain current under zero-gate bias (Idss) of 537 mA/mm, maximum transconductance (gm,max) of 439 mS/mm, and current gain cutoff frequency (fT) up to 58 GHz, and power gain cutoff frequency (fmax) of 73 GHz, have been achieved. At 28 GHz and 6 GHz, output power density (Pout) of 0.68 W/mm and 1.78 W/mm, and power added efficiency (PAE) of 5.92 % and 26.93 %, have also been demonstrated, respectively. This thesis also details the method of using ICCAP and ADS software to construct the small signal model of the devices with factors, such as device processing, layout design, epitaxial structure and effect of substrate, considered in the equivalent circuit. The correlation between device high frequency characteristics and the extracted parameters is analyzed.
