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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/81921


    Title: 應用於太赫茲影像雷達及無線通訊系統之40-nm CMOS壓控振盪器;A Voltage Controlled Oscillator in 40-nm CMOS for THz Imaging Radar and Wireless Communication Applications
    Authors: 趙宇軒;Chao, Yu-Hsuan
    Contributors: 電機工程學系
    Keywords: 太赫茲波;毫米波;壓控振盪器;調頻訊號產生器;發射機;Terahertz Wave;Millimeter Wave;Voltage Controlled Oscillator;Chirp Generator;Transmitter
    Date: 2019-10-02
    Issue Date: 2020-01-07 14:38:25 (UTC+8)
    Publisher: 國立中央大學
    Abstract: 本篇論文提出應用於太赫茲影像雷達系統之85-GHz調頻訊號產生器及應用於200-GHz無線發射機系統之100-GHz壓控振盪器(Voltage Controlled Oscillator, VCO),皆採用40-nm CMOS製程實現,達到體積小、低成本及高性能之優勢。
    85-GHz調頻訊號產生器使用85-GHz壓控振盪器採用交互耦合對架構產生振盪訊號,經一組除頻鏈(Divider Chain)將訊號頻率降至10 GHz附近,由於起始振盪訊號頻率較高,使用擁有高頻段及低功耗的兩級直接注入鎖定除頻器(Injection-Locked Frequency Divider, ILFD)電路實現,將頻率降至20 GHz左右,再由高鎖定範圍的電流模式邏輯除頻器(Current-Mode Logic, CML)電路達成除數為八之除頻鏈,最後經10-GHz輸出緩衝器輸出功率為-9 dBm的差動訊號,調頻範圍達12.2%,整體功耗為53.2 mW。搭配Analog Devices之ADF4159商用模組控制壓控振盪器的控制電壓,實現頻率隨時間變化的鋸齒波。並在壓控振盪器與除頻鏈之間加入輸入與輸出緩衝器,可量測85 GHz振盪訊號品質,若未符合預計規格,可利用外部訊號產生器提供85 GHz訊號至除頻鏈,避免後級除頻鏈電路無法進行量測。
    200-GHz無線發射機系統使用100-GHz壓控振盪器加入八組開關電容使其維持一定相位雜訊表現並增加調頻範圍,使用100-GHz緩衝器與放大器提供隔離與放大的功能,並在兩級之間加入測試電路,可量測前級壓控振盪器之起振頻率範圍,再透過100-GHz功率放大器使功率提升,使用100-GHz倍頻器,使訊號二倍頻至200 GHz,並加入振幅偏移調變器(Amplitude Shift Keying, ASK)載入20 Gbps數位訊號進行調變,輸出功率達0.3 dBm,最後透過介電共振器天線(Dielectric Resonator Antenna, DRA)將訊號傳送至接收機。此200-GHz無線發射機系統整體頻寬為6.2%,總功耗為230 mW。
    ;An 85-GHz chirp generator applied to THz imaging radar system and a 100-GHz VCO applied to 200-GHz transmitter for wireless communication are proposed in this thesis. By realizing in 40-nm CMOS technology, both chirp generator and transmitter system are small size, low cost and high performance.
    An 85-GHz chirp generator is composed of an 85-GHz cross-coupled VCO and a divide-by-8 divider chain. Due to high operating frequency of the VCO, ILFD with high speed and low power dissipation is used. Two stages of ILFD are included, so the input signal can be reduced by 4 times. The last stage of the divider chain is a wide locking range CML divider which output frequency is around 10 GHz. This 85-GHz chirp generator can provide -9 dBm output power with 12.2% locking range and power consumption of 53.2 mW. The control voltage of the VCO is tuned by ADF4159 of Analog Devices. In this way, the chirp generator can provide a sawtooth ramp FMCW signal. In order to measure the VCO oscillating signal and provide 85 GHz signal from signal generator while the VCO doesn’t work out, we design an I/O buffer between the VCO and the divider chain.
    A 200-GHz transmitter system consists of a 100-GHz VCO, a 100-GHz buffer with amplifier circuit, a 100-GHz power amplifier, a 100-GHz frequency doubler, an amplitude shift keying, and a dielectric resonator antenna. A 100-GHz VCO includes 8 switchable capacitors, which can keep low phase noise while increasing the tuning range. A test circuit between 100-GHz buffer and amplifier circuit is designed to measure resonant frequency of the VCO. The output power of this 200-GHz transmitter system achieves 0.3 dBm with 6.2% bandwidth and power consumption of 230 mW.
    Appears in Collections:[電機工程研究所] 博碩士論文

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