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    題名: 晶圓圖缺陷分類與嵌入式系統實現;Wafer Map Defect Pattern Classification and its Embedded System Implementation
    作者: 李郁晨;Lee, Yu-Chen
    貢獻者: 電機工程學系
    關鍵詞: 晶片缺陷;神經網路;深度可分離卷積;wafer defect;neural network;depthwise separable convolution
    日期: 2019-11-22
    上傳時間: 2020-01-07 14:39:53 (UTC+8)
    出版者: 國立中央大學
    摘要: 在半導體工業中,晶圓測試扮演不可或缺的一環,於生產的最後階段會進行不同電性的測試以確保產品的功能性,而測試結果再結合晶圓形狀所產生的圖形稱作晶圓圖(Wafer Map),可以決定是否進行後續封裝等動作。然而,判斷產生的缺陷(defect)大多仰賴人工來執行,不僅耗費時間且需要經驗豐富之工程師。
    本論文分別對網路上公開資料集WM-811K,以及公司合作所建立的資料集,進行晶圓圖缺陷分類。研究可分成兩個部分,一是神經網路的訓練,二是嵌入式系統上實現。神經網路部分,採用深度可分離卷積(depth separable convolution)的結構為基礎,設計出具有低參數量之神經網路,針對WM-811K中8類不同缺陷進行分類,最終可達97.01%準確度。在自行建立的資料集中,一共蒐集了16388張晶圓圖,定義21個缺陷類別,並對其進行擴增與分類,最終達87.4%準確度。系統方面,建立的資料使用MongoDB資料庫進行管理,放置於嵌入式板Jetson Nano,可連結遠端server進行訓練,回傳模型於嵌入式板執行推理(inference).此系統可以令使用者持續更新資料集,並對原模型進行優化,對於現今各公司晶圓缺陷定義不同,以及標注資料緩慢等問題,提供初步解決方案。;In the semiconductor industry, wafer testing plays an indispensable role. There are different electrical tests in the final stages to ensure the functionality of the product. The results with the wafer shape is called Wafer Map. This map could decide whether to go to next step – package. However, most judgments of the defect rely on human to execute, which is time-consuming and requires experienced engineers.
    In this paper, the wafer defect classification is carried out on the open dataset WM-811K. The dataset established by the cooperation with a company. The research can be divided into two parts, one is the training of neural network, and the other is implementation on embedded system. The neural network part is based on deep separable convolution. We design an architecture with low amount of parameters, which can classify the 8 different defects in WM-811K. It can finally achieve 97.01% accuracy. In the established dataset, a total of 16,388 wafers were collected, 21 defect categories were defined, and the data are augmented and classified. The final accuracy is 87.4% accuracy. On the system side, the established data is managed using the MongoDB database, placed on the embedded board Jetson Nano, which can be linked to remote servers for training and then it returns the model and performed on the embedded board to execute inference. This system enables users to continuously update the dataset and optimize the parameter model. It provides preliminary solutions to the different definition of wafer defects in today′s companies and solves the problem of slow labeling time.
    顯示於類別:[電機工程研究所] 博碩士論文

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