應用J類連續模式技術於Ka頻段砷化鎵與C頻段氮化鎵功率放大器之研製;Implementations on Ka-band GaAs and C-band GaN Power Amplifiers Using Class-J continuous mode Techniques

NCUIR > College of Electrical Engineering & Computer Science > Graduate Institute of Electrical Engineering > Electronic Thesis & Dissertation > Item 987654321/84205

Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/84205

Title:	應用J類連續模式技術於Ka頻段砷化鎵與C頻段氮化鎵功率放大器之研製;Implementations on Ka-band GaAs and C-band GaN Power Amplifiers Using Class-J continuous mode Techniques
Authors:	紀品瑜;Chi, Pin-Yu
Contributors:	電機工程學系
Keywords:	J類功率放大器;連續模式技術;Class J power amplifier;continuous mode techniques
Date:	2020-08-17
Issue Date:	2020-09-02 18:29:15 (UTC+8)
Publisher:	國立中央大學
Abstract:	本論文利用穩懋半導體WINTM 0.15-µm GaAs與0.25-µm GaN製程設計三顆功率放大器。電路設計上選擇操作於C頻段與Ka頻段，首先模擬不同製程之電晶體特性，選擇最佳之電晶體尺寸與操作電流密度，結合J類諧波調節網路形成寬頻且高效率匹配，最後量測電路特性以驗證電路設計之結果。第一顆使用WINTM 0.15-µm GaAs製程於Ka頻帶之J類功率放大器，電路設計採全積體化之兩級共源極電路架構，輸出端利用緊湊的基頻、二倍頻匹配網路達到J類的設計，輸入端與級間匹配則以最大功率作最大輸出匹配。量測結果為3-dB頻寬為25.5-28.6 GHz，最大傳輸增益為16.63 dB，飽和輸出功率為27.36 dBm，1-dB 增益壓縮點輸出功率為26.46 dBm，晶片面積為1.12 (1.4 × 0.8) mm2。第二顆使用WINTM 0.15-µm GaAs製程於Ka頻帶之J類功率放大器，電路設計採全積體化之兩級共源極電路架構，輸出端利用超緊湊的基頻、二倍頻匹配網路達到高效率J類的設計，輸入端與級間匹配則以最大功率作最大輸出寬頻匹配，量測結果為3-dB頻寬為27.4-29.1 GHz，傳輸最大增益為16.84 dB，飽和輸出功率為28.15 dBm，1-dB 增益壓縮點輸出功率為27.04 dBm，晶片面積為0.988 (1.3 × 0.76) mm2。第三顆使用WINTM 0.25-µm GaN製程於C頻帶之J類功率放大器，電路設計採全積體化之兩級共源極電路架構，輸出端利用超緊湊的基頻、二倍頻匹配網路達到高效率J類的設計，輸入端與級間匹配則作寬頻匹配，為了應用在N77頻段，其操作頻寬為3 - 4.3 GHz，傳輸最大增益為23.94 dB，飽和輸出功率為39.62 dBm，1-dB 增益壓縮點輸出功率為39.6 dBm，晶片面積為4.342 (2.6 × 1.67) mm2。 ;The thesis developed three power amplifiers that were designed in WINTM 0.15-µm GaAs, and 0.25-µm GaN for both C-band and Ka-band operations. Firstly, the transistor characteristics of different processes were simulated to choose the best transistor size and current density. The continuous class-J technique was adapted for high efficiency and broadband matching performance. Finally, these proof-of-concepts were verified by measuring various circuit performances, such as s-parameters, output power, linearity and digital modulation characteristics. The first chip presents a Ka-band monolithic microwave integrated circuit (MMIC) power amplifier in WINTM 0.25-µm GaAs technology. The high-efficiency performance is achieved by using continuous class-J mode for output matching networks and high power matching for both input and inter-stage matching networks. The designed power amplifier achieves a 3-dB bandwidth from 25.5 to 28.6 GHz with small signal gain of 16.63 dB. Continuous wave measurements demonstrate a maximum saturated output power of 27.36 dBm and OP1dB of 26.46 dBm, respectively. The chip size is 1.12 (1.4 × 0.8) mm2. The second chip presents a Ka-band MMIC power amplifier in WINTM 0.25-µm GaAs technology. The high-efficiency and broadband performances are achieved by using continuous Class-J mode for fundamental and second harmonic output matching networks and high power matching for both input and inter-stage matching networks. The amplifier achieves a 3-dB bandwidth from 27.4 to 29.1 GHz with small signal gain of 16.84 dB. Continuous wave measurements demonstrate a maximum saturated output power of 28.15 dBm and OP1dB of 27.04 dBm, respectively. The chip size is 0.988 (1.3 × 0.76) mm2. The third chip presents a C-band MMIC power amplifier in WINTM 0.25-µm GaN technology. The high-efficiency and broadband performances are achieved by using continuous Class-J mode for fundamental and second harmonic output matching networks and broadband matching for both input and inter-stage matching networks. The amplifier achieves a 3-dB bandwidth from 3 to 4.3 GHz with small signal gain of 23.94 dB. Continuous wave measurements demonstrate a maximum saturated output power of 39.62 dBm and OP1dB of 39.6 dBm, respectively. The chip size is 4.342 (2.6 × 1.67) mm2.
Appears in Collections:	[Graduate Institute of Electrical Engineering] Electronic Thesis & Dissertation

Files in This Item:

File	Description	Size	Format
index.html		0Kb	HTML	133	View/Open

社群 sharing

Loading...