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    題名: 垂直型氧化鎵蕭特基二極體於氧化鎵基板之製作與特性分析;Device Characteristics of Ga2O3 Vertial Schottky Barrier Diodes
    作者: 朱竑憲;Chu, Hung-Hsien
    貢獻者: 電機工程學系
    關鍵詞: 氧化鎵;蕭特基二極體;垂直;場電板;減小漏電流;蝕刻平台直徑;Ga2O3;Schottky Barrier Diodes;Vertical;Field plate;leakage current reduced;Mesa diameter
    日期: 2020-08-24
    上傳時間: 2020-09-02 18:34:18 (UTC+8)
    出版者: 國立中央大學
    摘要: 本論文主要針對在氧化鎵(-201)基板上製作不同場板長度之垂直型氧化鎵蕭特基二極體。對於蕭特基二極體元件,降低操作過程中的損耗、降低啟動電壓與低的漏電流值是非常重要的指標,而本論文將針對垂直型氧化鎵蕭特基二極體之場板大小的變化對於其元件特性進行研究。
    首先,分析無場板元件(Device A)、超過陽極大小之場板長度為 5 μm (Device B)、和場板蓋過隔離平台之元件(Device C)之蕭特基二極體基本電性。接著探討其製程後的特性表現,利用室溫下順向、逆向的電壓-電流的量測曲線,分析不同場板長度與臨界電場之關聯性。當場板長度蓋過隔離平台之元件,其啟動電壓(VON )為 0.75 V,與無場板設計之元件相同,且藉由場板金屬覆蓋住隔離平台之設計,其漏電流甚至比無場板設計之元件更小,導通電阻也下降至3.6 mΩ·cm2。也利用變溫來探討垂直型氧化鎵蕭特基二極體順向偏壓及逆向偏壓下的特性,在順向偏壓下可計算出其蕭特基能障約為0.8 eV,估算蒸鍍金屬後的蕭特基接觸有不均勻的接面。而逆向電流-電壓曲線可以進一步分析漏電流機制,因低溫下缺陷中之載子不易受溫度影響而移動,而在高溫下載子就易因溫度的影響而從缺陷中逃脫。量測得知,漏電流會隨著溫度而變化,當量測溫度上升時,漏電流上升幅度相較於先前溫度劇烈,推測可能是由於蝕刻後表面不平整及缺陷,在高溫時載子能掙脫束縛而造成較大的漏電流。
    ;β-Ga2O3 has attracted considerable interest as a promising wide-bandgap semiconductor material for high power devices. Aside from the availability of meltgrown substrates, the sizable bandgap value of 4.5–4.9 eV allows for a large critical electric field exceeding 5 MV cm−1 as experimentally observed. The major limitation at the moment is the lack of high quality patterning, doping and contacting processes that exist for the more mature semiconductors. In particular, Schottky rectifiers are attractive because of their fast switching speed, which is important for improving the efficiency of inductive motor controllers and power supplies and also their low turn-on voltages compared to p-n junction rectifiers.
    In this study, Ga2O3 vertical Schottky barrier diodes with four different mesa diameters and two types of field plate structure are proposed. Devices are investigated in the DC output characteristics, breakdown voltage and compared with each other to figure out the influence of field plate size and mesa diameter.
    Devices with field plate exceed anode area 5 µm and exceed mesa 5 µm are compared. By enlarging the mesa diameter, the mesa sidewall effects from dry etching can be reduced. The leakage current (IR) of device with field plate (FP) can be effectively reduce by 80% compared with the one without FP. With the field plate metal area increase, the device breakdown voltage VB can increase by as much as 150%.
    顯示於類別:[電機工程研究所] 博碩士論文

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