| 摘要: | 在這科技日新月異的時代中，電子產品的尺寸越做越小，而電子產品裡面晶片尺寸、薄膜電容的尺寸也同樣越來越小。在電容的製備中，傳統使用的氮化矽、氧化矽等介電材料具有高化學穩定性以及低漏電等優點，但它的低介電常數卻不足以因應尺寸逐漸縮小的電容需求，因此傳統介電材料將被High-k 材料或是由多層介電層組合所取代。然而，High-k 材料有著容易漏電以及電容不穩定性等缺點，大多需要昂貴的製程(原子層磊晶或雷射脈衝沉積)來確保品質，而多層介電層也有著製程複雜的限制。因此，本研究使用相對低成本的磁控濺鍍，利用改變濺鍍環境以及將銦錫氧化物薄膜中間層插入電極與介電層之間的方式有效地提升電容值。
在章節3 中，製備了使用N2/Ar 混和氣體以及純Ar 環境下濺鍍的氮化矽薄膜，使用N2/Ar 混和氣體濺鍍環境來製備的氮化矽薄膜具有高達17 的介電常數，高於純Ar濺鍍環境下的介電常數。此外，還高於所有其它已報導的濺鍍氮化矽薄膜以及相當於化學氣相沉積的氮化矽薄膜。在光電子能譜儀中可得知，在氬氣/氮氣混和氣體所濺鍍的氮化矽中，SiNx 為主要成分並且與濺鍍過程中游離的氮物質有關，並且在光致發光的儀器分析中可證實，在氬氣/氮氣混和氣體所製備的氮化矽薄膜比用純氬氣環境下製備的氮化矽薄膜具有更多的氮空缺。
在章節4 中，製備了Cu/Si-oxide/Cu (MIM) 和 Cu/Si-oxide/Indium-Tin-Oxide/Cu(MIM-ITO)兩種電容結構，MIM-ITO 結構 (1365.5 pF) 的電容經測量比 MIM 結構 (442 pF) 大四倍。 ITO 中間層增強了“邊緣效應”並導致在氧化矽膜中形成非化學計量比的
Si2O3 。 Si2O3 四面體呈現出強烈的自發偶極矩，在外加電場下導致氧化矽膜中的淨極化增加。通過 穿透式電子顯微鏡以及光電子能譜儀的分析，含 Si2O3 的氧化矽薄膜的生長可歸因於在氧化矽/ITO 介面有 (222)面傾向的 ITO 鋸齒狀表面。;With the continuous development of technology, the demand for electronic products is becoming smaller and more convenient. The chips in electronic products will also become smaller and smaller, which means that the area of capacitors inside the chip also needs to be reduced. In the fabrication of capacitors, traditionally used dielectric materials such as Si3N4 and SiO2 have the advantages of high chemical stability and low leakage, but their low dielectric
constant is not enough to meet the needs of gradually shrinking capacitors. Therefore, traditional dielectric materials are replaced by High-k materials or sandwich structures consisting of multiple dielectric layers. However, High-k materials have disadvantages such as easy leakage and capacitance instability. Most of them require expensive processes, such as atomic layer deposition or laser pulse deposition, to ensure quality. The sandwich structure dielectric layer also has some limitation of complex processes. Therefore, in this research, relatively low-cost magnetron sputtering was used to effectively improve the dielectric constant of traditional dielectric materials by changing the sputtering environment and inserting an ITO interlayer to meet the needs of high capacitance values.
In chapter 3, Si-nitride films sputtered using N2/Ar mixed gas flow and pure Ar ambient were prepared. Si-nitride films fabricated using the Ar/N2 mixed gas flow sputtering ambient
have a dielectric constant as high as 17, which is higher than that of pure Ar gas flow sputtering. In addition, it is higher than all other reported sputtered silicon nitride films and equivalent to chemical vapor deposited silicon nitride films. In X-ray photoelectron spectroscopy analysis, it can be known that in the Si-nitride sputtered by the Ar/N2 mixed gas flow, SiNx is the dominated phase, which is related to the radiative N species during the sputtering process. The photoluminescence analysis confirmed that the Si-nitride thin film sputtered in the Ar/N2 mixed gas flow has more N vacancies than the Si-nitride thin film sputtered in pure Ar gas flow.
In chapter 4, two parallel-plate capacitors, Cu/Si-oxide/Cu (MIM) and Cu/Sioxide/Indium-Tin-Oxide/Cu (MIM-ITO), were fabricated. The capacitance of MIM-ITO structure (1365.5 pF) was measured to be much larger than MIM structure (442 pF) by four folds. The ITO interlayer enhances the “edge effect” and results in non-stoichiometric Si2O3 phase formation in Si-oxide film. Si2O3 tetrahedrons present strong spontaneous dipoles, which result in an additional net polarization in the Si-oxide film under an applied electric field. With TEM images, (222)-preferred ITO crystalline phase was observed at the Si-oxide/ITO interface and served as the growth seed layer for Si2O3-contained Si-oxide film. |
