本論文分為兩個主要部份。首先，設計一個與一般雙載子接面電晶體製程相容的非晶矽/單晶矽質吸光區累崩區分離的累崩光二極體(SAM-APD)，並且利用半導體製程模擬軟體MEDICI與TSUPREM-4，計算元件特性和製程參數。最後將模擬結果實際應用於元件製程上，並完成元件的製作。 另一完成的研究主題是分別在非晶質超晶格結構(superlattice)中，加入p-i-a-SiC、p-i-n-a-SiC或p-i(a-SiC)-i-n(a-Si)非晶質複層的非晶質吸光區累崩區分離的超晶格累崩光二極體(SAM-SAPD)。這些元件都有相當高的光增益(optical gain)，其中加入p-i(a-SiC)-i-n(a-Si)非晶質薄膜的元件具有最高的光增益。實驗結果顯示，利用在累增區中加入高電場及傳導帶不連續等區域所完成的元件具有較佳的光電特性。 First, a BJT compatible process were used to fabricate an amorphous/crystalline Si separated absorption multiplication avalanche photodiode (SAM-APD) in this study. The performance and process parameters of the designed SAM-APD were simulated by using the MEDICI and TSUPREM-4. Eight levels of mask were needed to fabricate the device and the finished devices had rather poor characteristics, such as low optical gain and photocurrent, due to process complexity. Further efforts in device processings are needed to verify the performances of designed SAM-APD. Then three kinds of amorphous separated absorption multiplication superlattice avalamche photodiode (SAM-SAPD), each with additional p-n-a-SiC, p-i-n-a-SiC, or p-i(a-SiC)-i-n(a-Si) amorphous layers in substage of superlattice (SL), had been designed and fabricated successfully. These device had rather high optical gain, and the one with additional p-i(a-SiC)-i-n(a-Si) amorphous layers in substage of SL had the highest optical gain. The results of this study indicated that using high electric-field and conduction band-edge discontinuity in multiplication region of SAM-SAPD would improve its performance.