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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/9231

    Title: 一個2V 5GHz CMOS非整數頻率合成器與和差調變器設計;+C1893 A 2V 5GHz CMOS Fractional-N Frequency Synthesizer with a ΔΣ Modulator
    Authors: 張家賢;Jia-Xian Chang
    Contributors: 電機工程研究所
    Keywords: 非整數頻率合成器;和差調變器;多係數除頻器;Fractional-N Frequency Synthesizer;ΔΣ Modulator;Multi-Modulus Frequency Divider
    Date: 2001-07-31
    Issue Date: 2009-09-22 11:43:36 (UTC+8)
    Publisher: 國立中央大學圖書館
    Abstract:   頻率合成器(Frequency Synthesizer)是通訊系統射頻前端的一個重要元件。在以鎖相迴路(Phase-Locked Loops)為基礎的設計上,會遭遇頻率解析度(Frequency Resolution)、轉換速度(Switching Speed)與相位雜訊(Phase Noise)等問題。   本論文採用和差調變器(Sigma-Delta Modulator)技術的非整數頻率合成器,可同時達到好的頻率解析度、快速的轉換速度與低的相位雜訊。包含的元件有相位頻率偵測器(Phase Frequency Detector)、電荷充放器(Charge Pump)、迴路濾波器(Loop Filter)、壓控振盪器(Voltage Controlled Oscillator)、倍頻器(Frequency Doubler)、多係數除頻器(Multi-Modulus Frequency Divider)與二位元三階和差調變器(2-bit 3rd Order Sigma-Delta Modulator)。   在晶片設計上,針對5GHz的ISM頻帶設計一2V 5GHz的頻率合成器,以0.35μm 1P4M CMOS製程完成。在2V的操作電壓下,功率消耗為80mW,晶片面積為3210μm×2410μm。 Frequency Synthesizer is an important component in RF front end. In conventional PLL-based architecture, there exists some difficult design trade-off between the frequency resolution, the switching speed and the phase noise. This thesis proposes a single chip CMOS fractional-N frequency synthesizer using sigma-delta modulator. It can achieve fine frequency resolution, fast switching speed and low phase noise simultaneously. The frequency synthesizer is composed of a phase frequency detector, a charge pump, a loop filter, a VCO, a frequency doubler, a multi-modulus frequency divider and a 2-bit 3rd order sigma-delta modulator. The design of the 2V 5GHz frequency synthesizer aims at the 5GHz ISM band. Implemented in TSMC 0.35μm 1P4M CMOS technology, the circuit consumes 80mW from 2V supply and occupies chip size of 3210μm×2410μm.
    Appears in Collections:[電機工程研究所] 博碩士論文

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