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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/9292


    Title: 5.2GHz CMOS射頻接收器前端電路設計;5.2GHz CMOS RF Receiver Frond-end Circuits Design
    Authors: 梁志維;chi-wei liang
    Contributors: 電機工程研究所
    Keywords: 射頻;接收器;電路;CMOS;RF;receiver;circuit
    Date: 2002-10-07
    Issue Date: 2009-09-22 11:44:47 (UTC+8)
    Publisher: 國立中央大學圖書館
    Abstract: 在無線通訊系統的射頻前端實現上主要是使用砷化鍺或是雙載子接面電晶體的製程,然而隨著CMOS製程的快速進步和尺寸不斷縮小,它所可以提供和砷化鍺或是雙載子接面電晶體相比擬的單位電流增益截止頻率和最大操作頻率。因為如此CMOS製程被用來實現射頻前端電路就變得較容易。 本論文介紹一個使用台積電 0.18微米CMOS製程所實現的射頻前端電路, 他是適用於 5-GHz ISM頻段。這個前端電路在輸入端使用了一個低雜訊放大器. 接下來的混波器電路包含了一個對稱式被動單雙轉換器以實現雙平衡架構的混波器。六階的多相位濾波器和高線性度的內部緩衝器能排拒鏡像信號超過60dB。整體接收器在1.8V的電壓下有30mW的功率,高準度的四相位同步震盪器提供了接收器所需的本地信號,這個震盪器使用1/9的輸出頻率來進行鎖定, 這個震盪器也有效簡化整體頻率產生器設計的效果。 The radio frequency (RF) front-end of the wireless communication systems such as cellular phones, cordless phone, and personal communication system (PCS) are almost implemented by GaAs or Bipolar technologies due to their good performance in high frequency. However, the rapid advancement and scaling of the size done in CMOS technology, which now offers higher unity current gain cut off frequency (fT) and maximum operatng frequency (fmx), has been comparaed with GaAs and Bipolar. A RF frond-end circuit fabricated in TSMC 0.18um CMOS technology is presented in this thesis. It is suitable for 5-GHz ISM band. This frond-end circuit adopted a low-noise amplifier with single input. A symmetric passive balun is included in the mixer circuit to implement the double-balance mixer. The 6-stage polyphase filter and high linearity inter-stage buffer reject the image band more than 60dB. The overall receiver consumes 30mW with 1.8V supply voltage. The local signal is supplied by a high accuracy quadrature synchronous oscillator. This oscillator is locked by using 1/9 output frequency signal. This synchronous oscillator simplifies the frequency generator design.
    Appears in Collections:[電機工程研究所] 博碩士論文

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