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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/9301


    Title: CMOS射頻無線通訊發射端電路設計;CMOS wirless communication RF circuit design
    Authors: 黃智偉;Chih-Wei Huang
    Contributors: 電機工程研究所
    Keywords: 頻率合成器;混頻器;功率放大器;高頻電路設計;synthesizer;mixer;power amplifier;RF circuit design
    Date: 2002-06-14
    Issue Date: 2009-09-22 11:44:58 (UTC+8)
    Publisher: 國立中央大學圖書館
    Abstract: 摘要 近年來CMOS在製程技術上不斷的進步,使的它在高頻電路應用上也有不錯的表現。CMOS憑藉它在低成本、高整合度與高成熟度的特質,已逐漸主導了5GHz以下的通訊市場。本論文主要以CMOS射頻無線通訊發射端電路設計為主要的研究方向。在第二章中我們首先介紹功率放大器的設計原理與方法,並且設計了一個兩級的功率放大器。在第三章中主要針對射頻前端升頻混頻器來做介紹,由於升頻混頻器的線性度非常重要,所以我們設計了三種不同架構的雙平衡式升頻混器,並且設計了一個環型平衡器來量測所設計的雙平衡式混頻器,最後並比較這三種混頻器的P1dB和IP3等線性特性來比較其線性度。由於混頻器的本地振盪源信號是由頻率合成器提供,頻率合成器輸出信號的優劣,影響到混頻器輸出的信號品質。第四章中我們探討了鎖相迴路的原理,與設計方法。並且對鎖相迴路的雜訊與迴路濾波器的特性做了很多探討。最後我們設計了2.4 GHz與5.2 GHz兩種ISM頻帶的頻率合成器。由於5.2 GHz對一般除頻電路來說頻率太高,所以在設計上我們先用一個高速除頻電路將頻率降一半下來,再由前置除頻器除頻。並在5.2 GHz頻率合成器中設計了一個四相位輸出的壓控振盪器,方便混頻器作IQ頻道的調變解調,讓頻率合成器與系統的整合更加容易。 Abstract In these years, CMOS technology has better performance in radio frequency (RF) circuit design by improving the process. The thesis bases on the RF circuit design. In the chapter 2, we introduce the principles and methods of the power amplifier circuit design, and we design a two-stage power amplifier. In the chapter 3, we introduce the RF up-conversion mixer. The linearity of the up-conversion mixer is very important, so we design three kinds of up-conversion mixer to compare their performance. In the chapter 4, we introduce the principles and circuit design of the frequency synthesizer. We also discuss the phase lock loop noise and the loop filter. At last, we design a 2.4GHz and a 5.2GHz frequency synthesizer. Since the 5.2GHz frequency is very fast, we design a high-speed divide-two circuit to half the frequency before the prescaler. In order to easy the system combination, we design a quadrature phase VCO to modulate or demodulate the IQ channel conveniently.
    Appears in Collections:[電機工程研究所] 博碩士論文

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