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    题名: 結合耦合電感與可擴展倍壓單元之低輸入電流漣波高升壓轉換器;High Step-up DC-DC Converter With Low Input Current Ripple Combining Coupled Inductor and Scalable Voltage Multiplier
    作者: 詹永騰;ZHAN, YONG-TENG
    贡献者: 電機工程學系
    关键词: 直流–直流轉換器;高電壓增益;倍壓單元;低輸入電流漣波;二次升壓轉換器;耦合電感;非隔離式轉換器;DC–DC Converter;High Voltage Gain;Voltage Multiplier Cell (VMC);Low Input Current Ripple;Quadratic Boost Converter (QBC);Non–Isolated Converter
    日期: 2023-07-24
    上传时间: 2024-09-19 16:53:53 (UTC+8)
    出版者: 國立中央大學
    摘要: 本論文提出一升壓的直流-直流轉換器,其架構是以二次升壓電路為基底並結合了雙繞組耦合電感、輸入電流漣波抑制單元和與耦合電感二次側整合的可疊加階數倍壓單元電路。提出的轉換器能在較低的工作週期下達到高輸出電壓,也可透過調整耦合電感的二次側繞組匝數與倍壓單元階數,達到所需之高電壓增益目的;輸入端電感與兩電容串聯形成的輸入電流漣波抑制單元明顯降低了輸入端的電流漣波大小;僅使用單個開關元件,控制相較簡易且電壓應力低於輸出端電壓,進而降低開關的損耗;由於耦合電感產生的漏電感,提供部分輸出二極體零電流切換的特性,使二極體的反向恢復問題與導通損耗得以緩解。
    本論文明確分析電路的運作原理與穩態電壓增益並且計算各項元件的應力公式與參數設計,訂出轉換器架構中各項元件的規格和參數,此外,藉由所計算出的各項元件應力公式進行損耗與效率估算。最後,進行模擬與實作所提出的電路以驗證可行性、效能及理論分析。
    ;This thesis proposes a step-up DC-DC converter, which is based on quadratic boost circuit and combines dual winding coupled inductor, a low input current ripple unit, and a stacked order voltage multiplier unit circuit integrated with the secondary side of the coupled inductor. The proposed converter can achieve high output voltage at lower duty cycle, and can also achieve the desired high voltage gain by adjusting the turn ratio of the coupled inductor and the order of the voltage multiplier unit; Input current ripple suppression unit formed by the series connection of the input inductor and two capacitors significantly reduces the input current ripple; Using only a single switch element, the control is relatively simple and voltage stress is lower than the output voltage, thereby reducing switch losses; Due to the leakage inductance generated by the coupling inductance, it provides the characteristics of output diode zero current switching, so that the reverse recovery problem and conduction loss of the diode can be alleviated.
    This thesis accurately analyzes the operating principle of the circuit and steady-state voltage gain, the stress formulas and parameter designs of each component are calculated to clearly understand the specifications and parameters of each component in the proposed converter architecture. In addition, the loss and efficiency estimation is carried out using the stress formulas of each component calculated in the previous section. Finally, simulate and experiment the proposed circuit to verify the feasibility, performance, and theoretical analysis.
    显示于类别:[電機工程研究所] 博碩士論文

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