高速磷化銦異質接面雙載子電晶體之研製; Design and Implementation of High-Speed InP-based Heterojunction Bipolar Transistor

NCUIR > College of Electrical Engineering & Computer Science > Graduate Institute of Electrical Engineering > Electronic Thesis & Dissertation > Item 987654321/9534

Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/9534

Title:	高速磷化銦異質接面雙載子電晶體之研製;Design and Implementation of High-Speed InP-based Heterojunction Bipolar Transistor
Authors:	洪志明;Jyh-Ming Hung
Contributors:	電機工程研究所
Keywords:	磷化銦;異質接面雙載子電晶體;InP;HBT;InP HBT
Date:	2003-06-23
Issue Date:	2009-09-22 11:49:51 (UTC+8)
Publisher:	國立中央大學圖書館
Abstract:	磷化銦異質接面雙載子電晶體(InP HBT)由於具備高電子遷移率、高操作頻率及低導通電壓，並可以跟長波長光纖通訊結合等優點，是應用於有線/無線通訊系統、高速數位電路以及光纖通訊元件中的最佳選擇。本論文主要使用磷化銦/砷化鋁銦鎵(InP/InAlGaAs)材料來研製異質接面雙載子電晶體，來符合高速無線通訊系統(Ka-band)與光纖通訊(40 Gb/s)要求。電晶體的研製包括單異質接面電晶體(SHBT)與雙異質接面電晶體(DHBT)，在雙異質接面(DHBT)的基集接面採用砷化鋁銦鎵組長漸進與高摻雜層來減少DEC的電流阻擋；在光罩上設計不同佈局之元件型態，比較不同佈局元件設計與製程對高頻特性之影響，並進而提出最佳的元件佈局設計。完成的大尺寸電晶體元件(射極面積為75 × 75 μm2)在集極電壓IC = 80 mA，InP/InAlGaAs SHBT之電流增益為87，崩潰電壓(BVCEO)為3 V，偏移電壓(VCE,offset)為150 mV；而InP/InAlGaAs DHBT之電流增益為39，崩潰電壓(BVCEO)為10 V，偏移電壓(VCE,offset)為90 mV。DHBT可以得到崩潰電壓與偏移電壓的改善，使之適用於高速無線通訊系統的功率放大器。經過10道光罩製作所完成的小尺寸電晶體元件(射極面積為3 × 12 μm2，製程為自我校準的技術)，在集極電壓VCE = 2 V與集極電流密度JC = 50 kA/cm2之偏壓下，InP/InAlGaAs SHBT之截止頻率(ft)可達80 GHz，最大震盪頻率(fmax)為58 GHz；而InP/InAlGaAs DHBT截止頻率(ft)可達77 GHz，最大震盪頻率(fmax)為80 GHz。在元件佈局設計上，最好的元件特性為使用自我校準的技術，且基射極歐姆接觸金屬均採用isolated pad方式連線，來有效減少元件基-集極接面面積，進而降低基集極接面電容，有效提高元件高頻特性。 Because the InP-based heterojunction bipolar transistor(HBT) has several merits of high electron mobility, high operation frequency, low turn-on voltage and combine with long wavelength fiber communication system, it’s the best choice for wire/wireless communication system, high speed digital circuit and fiber communication device applications. This thesis used the InP/InAlGaAs materials to product heterojunction bipolar transistor for high-speed wireless communication system(Ka-band) and fiber communication system(40Gb/s). The transistor production include single heterojunction bipolar transistor(SHBT) and double heterojunction bipolar transistor(DHBT). In DHBT’s base-collector junction used InAlGaAs long grading and high doped layer to reduce the current blacking at DEC. We design different type of devices in mask lay-out, compare different type of devices and process with high-frequency characteristic and bring up the best type of device design. In large size transistor devices, we demonstrated the current gain of InP/InAlGaAs SHBT(emitter size is 75 × 75 μm2) was 87 at collector voltage IC = 80 mA, the breakdown voltage(BVCEO) was 3V and the offset voltage(VCE,offset) was 150mV. Respectively, the current gain of InP/InAlGaAs DHBT(emitter size is 75 × 75 μm2) was 39 at collector voltage IC = 80 mA, the breakdown voltage(BVCEO) was 10V and the offset voltage(VCE,offset) was 90mV. DHBT can get improvement in breakdown voltage and offset voltage and suit to the power amplifier applications in high-speed wireless communication system. We also demonstrated the small size transistor device(emitter size is 3 × 12 μm2, self-aligned technology) by ten mask process. The InP/InAlGaAs SHBT with cut-off frequency(ft) up to 80GHz and the maximum oscillation frequency(fmax) up to 58GHz, respectively, InP/InAlGaAs DHBT ft up to 78GHz and fmax up to 80GHz at collector voltage VCE = 2 V and collector current density JC = 50 kA/cm2. In the type of device design, the best device characteristic is fabricated by used self-aligned technology and the isolated pads type in the base and emitter ohmic contact metal. It’s effective to reduce the base-collector junction area and the base-collector junction capacitance and enhanced the high frequency characteristic of devices.
Appears in Collections:	[電機工程研究所] 博碩士論文

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