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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/9834


    Title: 內容定址記憶體之鄰近區域樣型敏感瑕疵測試演算法;Test Algorithms for CAMs with Neighborhood Pattern-Sensitive Faults
    Authors: 郭曜彰;Yao-Chang Kuo
    Contributors: 電機工程研究所
    Keywords: 內容定址記憶體;測試演算法;鄰近區域樣型敏感瑕疵;Test Algorithm;Neighborhood Pattern-Sensitive Faults;CAM
    Date: 2006-01-05
    Issue Date: 2009-09-22 11:57:23 (UTC+8)
    Publisher: 國立中央大學圖書館
    Abstract: 在這篇論文裡提出了兩個關於內容定址記憶體之鄰近區域樣型敏感瑕疵(NPSFs) 測試演算法。第一個部分是針對二元內容定址記憶體(BCAMs)的測試演算法。與之前提出的演算法不同之處在於之前的演算法是針對第二型(Type-2)鄰近區域樣型敏感瑕疵,而提出的演算法是對於第一型(Type-1)鄰近區域樣型敏感瑕疵,並且不需要任何提高測試容易性的電路。所提出的演算法共需要177 1/3N+238 2/3B 讀取/寫入的動作去偵測靜態鄰近區域樣型敏感瑕疵(SNPSF),被動式鄰近區域樣型敏感瑕疵(PNPSFs),和主動式鄰近區域樣型敏感瑕疵(ANPSFs),對於一個NxB個位元的二元內容定址記憶體而言。 這篇論文的第二個部分是關於三元內容定址記憶體(TCAMs)之鄰近區域樣型敏感瑕疵測試演算法。在三元內容定址記憶體的測試鄰近區域樣型敏感瑕疵是比在二元內容定址記憶體困難,原因在於三元內容定址記憶體的特殊硬體結構。所提出的演算法利用有限制的兩類(two-group)方式,同樣可以偵測到第一型的靜態鄰近區域樣型敏感瑕疵(SNPSF),被動式鄰近區域樣型敏感瑕疵(PNPSFs),和主動式鄰近區域樣型敏感瑕疵(ANPSFs)。所提出的演算法需要288N讀取和寫入的動作去偵測所有定義的鄰近區域樣型敏感瑕疵。 This thesis presents two algorithms for detecting neighborhood pattern-sensitive faults (NPSFs) for content addressable memories. The first part presents a test algorithm for binary content addressable memories (BCAMs) with NPSFs. Differ from previous works which test BCAMs with Type-2 NPSFs, the proposed test algorithms is for Type-1 NPSFs and the BCAM without inserting design-for-testability circuitry is assumed. The proposed test algorithm requires 177 1/3N+238 2/3B Read/Write/Compare operations to cover static, passive, and active NPSFs for an NxB-bit BCAM. The second part of this thesis presents a test algorithm for ternary content addressable memories (TCAMs) with NPSFs. Testing NPSFs in TCAMs is more difficult than that in BCAMs due to the special TCAM cell structure. The proposed test algorithm can cover static, passive, and active Type-1 NPSFs by using constrained two-group methodology. The test algorithm requires 288N Read/Write operations to cover the defined NPSF.
    Appears in Collections:[Graduate Institute of Electrical Engineering] Electronic Thesis & Dissertation

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