本論文所研究的內容為微波振盪器之積體電路設計，為降低高頻振盪器的相 位雜訊，論文使用雙推式振盪器架構，並且以理論證明此架構確實可有效改善相 位雜訊。使用WIN pHEMT 0.15-μm 製程的電路包括(1)Ka-頻段基頻壓控振盪 器，振盪頻率為24.97 GHz，可調頻率範圍270 MHz，偏移主頻1 MHz 之相位雜 訊為-96.84 dBc/Hz；(2)Ku-頻段有限接地之共面波導基頻振盪器，振盪頻率14.75 GHz，偏移主頻1 MHz 之相位雜訊為-118.96 dBc/Hz，優化指數(FOM)為-191.8 dBc/Hz ；(3)Ka-頻段有限接地之共面波導雙推式振盪器，振盪頻率為30.3 GHz， 偏移主頻1MHz 之相位雜訊為-113.2 dBc/Hz，優化指數為-188.16 dBc/Hz 。最後 是使用TSMC CMOS 0.18-μm 製程所實現的(4)Ka-頻段交互耦合之雙推式壓控振 盪器，振盪頻率為26.7 GHz，可調頻率範圍為1.95 GHz，偏移主頻1 MHz 之相 位雜訊為-117.5 dBc/Hz。且此電路展現出優異的優化指數為-199.82 dBc/Hz。 The content of this thesis is about microwave oscillator integrated circuit design. The push-push oscillator topology is used in this thesis to lower phase noise of high oscillation frequency oscillator. General phase noise theory on push-push oscillator is developed to prove it’s naturally having low phase noise property. WINTM pHEMT 0.15-μm technology is adopted to implement：(1) Ka-band fundamental VCO. The oscillation frequency is 24.97 GHz, tuning range is 270 MHz, and phase noise is -96.84 dBc/Hz at 1MHz offset；(2) The second circuit is a Ku-band Finite Ground (FG) CPW fundamental oscillator. The oscillation frequency is 14.75 GHz, phase noise is -118.96 dBc/Hz at 1 MHz offset, and -191.8 dBc/Hz of Figure-of-Merit(FOM)；(3) The third circuit is a Ka-band FG CPW push-push oscillator. The oscillation frequency is 30.3 GHz, phase noise is -113.2 dBc/Hz at 1MHz offset, and FOM is -188.16 dBc/Hz. Finally, TSMC CMOS 0.18-μm technology is adopted to implement the fourth circuit which is a Ka-band cross-coupled push-push VCO. The oscillation frequency is 26.7 GHz, tuning range is 1.95 GHz, phase noise is -117.5 dBc/Hz at 1MHz offset and exhibited an excellent FOM of -199.82 dBc/Hz.
