Programmable System-on-Chip for Silicon Prototyping

NCUIR > College of Electrical Engineering & Computer Science > Department of Electrical Engineering > journal & Dissertation > Item 987654321/52094

Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/52094

Title:	Programmable System-on-Chip for Silicon Prototyping
Authors:	Huang,CM;Wu,CM;Yang,CC;Chen,SL;Chen,CS;Wang,JJ;Lee,KJ;Wey,CL
Contributors:	電機工程學系
Keywords:	FPGA IMPLEMENTATION;CONTROL ALGORITHM;CONTROLLERS
Date:	2011
Issue Date:	2012-03-28 10:15:18 (UTC+8)
Publisher:	國立中央大學
Abstract:	This paper presents a programmable system-on-chip (SoC) design methodology which integrates multiple heterogeneous SoC design projects into a single chip such that the total silicon prototyping cost for these projects can be greatly reduced by sharing a common SoC platform. In this implementation, an integrated SoC platform is comprised of eight SoC projects. When these eight SoC projects are designed separately, the total area is approximately 143.03 mm(2), while the area of the integrated platform is about 24.43 mm(2). The area reduction is significant, so is the fabrication cost. Once the integrated platform chip is fabricated, three programming schemes are carried out to allow the integrated chip to act as the individual SoC design projects. A test chip is designed and implemented using the TSMC 0.13-mu m CMOS generic logic process technology.
Relation:	IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
Appears in Collections:	[Department of Electrical Engineering] journal & Dissertation

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