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| 題名: | 應用於n77 頻段之氮化鎵/砷化鎵積體被動元件多悌功率放大器暨使用B類連續技術於C/Ka頻帶氮化鎵/砷化鎵功率放大器之研製;Implementations on n77-band GaN Doherty Power Amplifier with GaAs Integrated Passive Devices and C/Ka bands GaN/GaAs Power Amplifiers with Class-B Continuous Mode Techniques |
| 作者: | 陳冠州;Chen, Kuan-Chou |
| 貢獻者: | 電機工程學系 |
| 關鍵詞: | 功率放大器;氮化鎵;砷化鎵;B類連續模式;多悌;power amplifier;GaN;GaAs;Class-B Continuous Mode;Doherty |
| 日期: | 2021-08-26 |
| 上傳時間: | 2021-12-07 13:11:33 (UTC+8) |
| 出版者: | 國立中央大學 |
| 摘要: | 本論文使用穩懋半導體公司(WINTM)所提供之0.25-?m GaN/SiC 製程與砷化鎵積體被動元件 (WIPD, WIN Integrated Passive Device) 製程以及0.15-?m InGaAs pHEMT 製程，分別進行n77頻段多悌功率放大器、C頻段B類連續模式功率放大器以及Ka頻段寬頻功率放大器之設計。
第二章提出採用多悌負載調變網路於氮化鎵/砷化鎵積體被動元件功率放大器之研究，來改善一般功率放大器回退效率不佳的問題，量測結果顯示3-dB 頻寬為 3.1 ~ 4.0 GHz，最佳傳輸增益為10.7 dB，因為量測的限制，大訊號量測無法提供完整數據，模擬結果顯示了在3.3 ~ 4.1 GHz的頻帶內，飽和效率約68.3 %，回退6 dB時的效率，約為51 %，氮化鎵晶片面積為0.77 (1.6 × 0.48) mm2，砷化鎵晶片面積為5.08 (1.36 × 1.87) mm2。
第三章提出應用於C頻段寬頻高效率氮化鎵功率放大器，透過偏壓挑選的方式，改善AM-AM的線性度，輸出匹配電路利用B類連續技術的方式，完成基頻與二次諧波項的匹配，來達到寬頻且高效率之功率放大器。量測結果顯示最佳傳輸增益為20.7 dB，3 dB頻寬為4.1 – 5.0 GHz，飽和輸出功率為 38 dBm，功率附加效率最高可達 40 %，晶片面積為4.86 (2.76 × 1.76) mm2。
第四章提出應用於 Ka 頻段寬頻高效率砷化鎵功率放大器，透過偏壓挑選的方式，提供一種不損失增益與效率的前提下，達到最好的增益、輸出功率與效率的權衡，輸出匹配電路沿用連續B類技術，達到寬頻且高效率之功率放大器。量測結果顯示最佳傳輸增益為18.8 dB，3 dB頻寬為25 – 30.2 GHz，飽和輸出功率為 25.5 dBm，功率附加效率最高可達 29.7 %，晶片面積為1.08 (1.32 × 0.82) mm2。;The thesis developed three power amplifiers that were designed in WINTM 0.25-?m GaN/SiC, GaAs integrated passive devices (IPD), and 0.15-?m GaAs processes. The first design is a Doherty power amplifier (DPA) for n77 band (3.3-4.2 GHz) application in GaN and GaAs IPD processes, the second one is a continuous class-B mode power amplifier for C band operation in GaN/SiC process and the third one is a continuous class-B mode power amplifier for Ka band operation in 0.15 m GaAs pHEMT process.
Chapter 2 presents an n77-band DPA in GaN and GaAs IPD processes. To improve the drawback of poor efficiency at power back-off in conventional power amplifier. The measurements achieve a peak power gain of 10.7 dB across a 3-dB bandwidth from 3.1 to 4.0 GHz. Due to measurement limitation, large signal measurement cannot provide complete data for now. The simulation results show a saturated drain efficiency of 68.3 %, and a drain efficiency at back-off 6 dB of 51 % in n77 band. The chip area of the GaN die is 0.77 (1.6 × 0.48) mm2, and the chip area of the GaAs IPD is 5.08 (1.36 × 1.87) mm2.
Chapter 3 presents a C band broadband high efficiency power amplifier in GaN/SiC process. According to the analysis of large signal transconductance, the appropriate bias voltage is selected to improve the AM-AM linearity. The high-efficiency and broadband performances are achieved by using continuous Class-B mode for the fundamental and second harmonics output matching network. The measurement results show that the peak power gain is 20.7 dB, the 3-dB bandwidth is from 4.1 to 5.0 GHz, the saturated output power is 38 dBm, the peak power added efficiency is to 40 %, and the chip area is 4.86 (2.76 × 1.76) mm2.
Chapter 4 presents a Ka band broadband high efficiency power amplifier in GaAs process. The power amplifier achieves the best trade-off among gain, output power and efficiency without loss of the gain and efficiency via proper bias selections. The high-efficiency and broadband performances are achieved by using continuous Class-B mode for fundamental and second harmonics output matching network. The measurement results show that the peak power gain is 18.8 dB, the 3-dB bandwidth is from 25 to 30.2 GHz, the saturated output power is 25.5 dBm, the peak power added efficiency is to 29.7%, and the chip area is 1.08 (1.32 × 0.82) mm2. |
| 顯示於類別: | [電機工程研究所] 博碩士論文
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