8T靜態隨機存取記憶體運算的老化檢測和容忍機制：適用於邏輯和 MAC 運算的應用;An Aging Detection and Tolerance Mechanism for 8T-SRAM Computing In-Memory Architectures: Adapting to Logic and MAC Operations

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題名:	8T靜態隨機存取記憶體運算的老化檢測和容忍機制：適用於邏輯和 MAC 運算的應用;An Aging Detection and Tolerance Mechanism for 8T-SRAM Computing In-Memory Architectures: Adapting to Logic and MAC Operations
作者:	金昌明;Chin, Chang-Ming
貢獻者:	電機工程學系
關鍵詞:	運算記憶體;偏壓溫度不穩定性;熱載子注入;8T靜態隨機存取記憶體;馮紐曼瓶頸;Computing In-Memory;bias temperature instability;Hot-carrier injection;8T SRAM;von Neumann bottleneck
日期:	2023-10-12
上傳時間:	2024-09-19 17:09:45 (UTC+8)
出版者:	國立中央大學
摘要:	如今，馮紐曼體系結構（von Neumann architecture，VNA）被認為是幾乎所有數字計算機的基本架構。然而對於圖像識別和自然語言處理等數據密集型應用，可能會在記憶體和計算核心之間傳輸大量數據，導致眾所周知的馮紐曼瓶頸。因此龐大的資料流量就使整體效率受到非常嚴重的限制。為了克服這個瓶頸，記憶體內運算（Computing In-Memory，CIM）被認為是一個有前途的解決方案，通過在記憶體內直接執行運算操作來消除處理單元和記憶體之間頻繁數據傳輸的需求。在各種CIM架構中，基於SRAM的CIM已經成為最廣泛研究的方法之一。 SRAM單元具有高寫入耐久性和與先進邏輯工藝的兼容性，使其成為CIM實現的理想候選。然而，這些結構容易受到工藝變異和老化效應，例如偏壓溫度不穩定性（Bias Temperature Instability，BTI）和熱載子注入（Hot Carrier Injection，HCI），這對電路性能和壽命構成了重大威脅。為了應對這些挑戰並確保CIM架構的可靠性，我們開發了一個考慮老化因素的框架，旨在增強邏輯操作和MAC操作中8T SRAM CIM架構的穩健性。在邏輯運算方面，我們提出了一種可以識別老化字組(aged word)的檢測方法，以及兩種老化容忍方法。在MAC操作中，我們提出了一種自檢測老化檢測器設計，可以識別和記錄存儲塊(memory blocks)中的老化狀態，以及通過添加備用行的老化容忍方法。最終實驗結果表明，在考慮了工藝變異和老化效應的作用下，我們的方法能有效地提高CIM的可靠性，且避免了顯著的功耗和面積開銷。 ;Nowadays, von Neumann architecture (VNA) has been widely applied to almost all digital computers since it simplifies the microcontroller chip design by separating processing units and memory. However, the data-intensive applications such as image recognition and natural language processing may transfer huge amount of data between memory and the computing cores, which causes a well-known von Neumann bottleneck when the communication bandwidth is limited. In order to overcome this bottleneck, Computing In-Memory (CIM) has been considered as a promising solution by performing operations directly within the memory to eliminate the need for frequent data transfers between the processing unit and memory. Among the various CIM architectures, SRAM-based CIM has emerged as one of the most extensively researched approaches. SRAM cells offer high write endurance and compatibility with advanced logic processes, making it an ideal candidate for CIM implementations. However, these structures are susceptible to process variations and aging effects like Bias Temperature Instability (BTI) and Hot Carrier Injection (HCI), posing significant threats to circuit performance and lifetime. To address these challenges and ensure the reliability of the CIM architecture, we have developed an aging-aware framework which can enhance the robustness of the 8T SRAM CIM architecture in logic operations and MAC operations. In logic operation, we propose a self-testing aging detection method that can identify aged words, and two aging tolerance methods. In MAC operation, we propose a self-detect aging detector design which can identify and record aging states in memory blocks, and an aging tolerance method by adding spare rows. Experimental results show that our approach effectively improves the reliability of CIM considering process variation and aging effects without significant power and area overhead.
顯示於類別:	[電機工程研究所] 博碩士論文

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