Institute of Information Science;Taipei: 社團法人中華民國計算語言學學會
摘要:
摘要: This paper proposes a simple and effective built-in self-repair (BISR) scheme for content addressable memories (CAMs) with address-input-free writing function. A programmable built-in self-test (BIST) circuit is designed to generate different March-like test algorithms which can cover typical random access memory faults and comparison faults. A reeonfigurable priority encoder is proposed to skip faulty words of a defective CAM. The delay penalty incurred by the reeonfigurable priority encoder is regardless of the number of used spare rows. Analysis and simulation results show that the proposed BISR scheme can efficiently improve the reliability of the CAM. The area cost of the BISR design is only about 4.87% for a 256x128 bit CAM with 7 spare words. 出版者: Taipei: 社團法人中華民國計算語言學學會 出版日期: 2013-05-01 出處: Journal of Information Science and Engineering, 2013-05, Vol.29 (3), p.493-507 資源來源: 中文電子期刊服務 CEPS: Chinese Electronic Periodical Services 版權: 2014 INIST-CNRS 識別號: ISSN: 1016-2364 識別號: DOI: 10.6688/JISE.2013.29.3.6