Institution of Engineering and Technology;The Institution of Engineering and Technology
摘要:
摘要： Multi-stage all-pass networks can be used to realise broadband phase shifters with low phase error. In this study, single-stage and two-stage all-pass networks with internal switched capacitors are investigated. Potentials and limitations of using the all-pass networks with internal switched capacitors for phase shifter design are examined. On the basis of the single-stage and two-stage all-pass networks, a fully-differential digital phase shifter with 6-bit resolution is designed. The digital phase shifter is implemented using a 0.18-μm complementary metal-oxide semiconductor process. The chip area is 2.80 × 1.75 mm2. Measurement results show that minimum root-mean-square phase error of 2° is achieved from 2.19 to 2.82 GHz, which translates into a bandwidth (BW) of 25%. The average insertion loss is 14.6 dB at the design frequency of 2.4 GHz. Over the entire BW, the return loss is greater than 9.2 dB and the amplitude error is within ±1 dB. 出版者： The Institution of Engineering and Technology 出版日期： 2015-08-20 出處： IET microwaves, antennas & propagation, 2015-08, Vol.9 (11), p.1144-1151 資源來源： Wiley Online Library Open Access 版權： The Institution of Engineering and Technology 版權： 2015 The Institution of Engineering and Technology 識別號： ISSN: 1751-8725 識別號： EISSN: 1751-8733 識別號： DOI: 10.1049/iet-map.2014.0687
