Institute of Electrical and Electronics Engineers Inc.;IEEE
摘要:
摘要： A Ka-band monolithic high-efficiency frequency quadrupler using a GaAs heterojunction bipolar transistor and pseudomorphic high electron-mobility transistor technology is presented in this paper. The frequency quadrupler is constructed cascading two frequency doublers. The frequency doubler employs a modified common-base/common-source topology to enhance the second harmonic efficiently. The dc bias condition, harmonic output power, conversion gain, and efficiency for variable configurations are investigated. Two phase-shifter networks are used to reduce phase error and improve the fundamental rejection. Between 23-30 GHz, the proposed frequency quadrupler features a conversion gain of higher than -1 dB with an input power of 4 dBm. The maximum conversion gain is 2.7 dB at 28 GHz with an efficiency of up to 8% and a power-added efficiency of 3.6%. The maximum output 1-dB compression point (P 1 dB) and the saturation output power (P sat ) are higher than 7 and 8.2 dBm, respectively. The overall chip size is 2×1 mm 2 . 其他題名： TMTT 出版者： IEEE 出版日期： 2013-10-01 出處： IEEE transactions on microwave theory and techniques, 2013-10, Vol.61 (10), p.3674-3689 資源來源： IEEE Electronic Library (IEL) 識別號： ISSN: 0018-9480 識別號： EISSN: 1557-9670 識別號： DOI: 10.1109/TMTT.2013.2277991 識別號： CODEN: IETMAB
