Institute of Electrical and Electronics Engineers Inc.;New York, NY: IEEE
摘要:
摘要： In this paper, we present design and analysis of a W -band divide-by-three injection-locked frequency divider (ILFD) in 90 nm CMOS process. Based on the proposed topology, the locking range can be enhanced without additional dc power consumption due to the boost of the second harmonic in the ILFD, and the small input capacitance is more feasible for W -Band PLL integration. The locking range of the ILFD is investigated to obtain a theoretical model. From the analysis, the locking range is proportional to the device size of the injectors and the amplitude of the injection signal. In addition, the locking range can be enhanced with a proper gate dc bias of the injectors. The measured locking range of the proposed ILFD is from 91.4 to 93.5 GHz without varactor tuning, and the output power is higher than -15 dBm. The core dc power consumption is 1.5 mW with a supply voltage of 0.7 V. 其他題名： TMTT 出版者： New York, NY: IEEE 出版日期： 2012-06-01 出處： IEEE transactions on microwave theory and techniques, 2012-06, Vol.60 (6), p.1617-1625 資源來源： IEEE Electronic Library (IEL) 版權： 2015 INIST-CNRS 識別號： ISSN: 0018-9480 識別號： EISSN: 1557-9670 識別號： DOI: 10.1109/TMTT.2012.2189244 識別號： CODEN: IETMAB
