Automatic IP Generation of FFT/IFFT Processors with Word-Length Optimization for MIMO-OFDM Systems

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題名:	Automatic IP Generation of FFT/IFFT Processors with Word-Length Optimization for MIMO-OFDM Systems
作者:	Tsai,PY;Chen,CW;Huang,MY
貢獻者:	電機工程學系
關鍵詞:	FFT PROCESSOR;HIGH-SPEED;UWB APPLICATIONS;DESIGN;CORES;IMPLEMENTATION;COST;CHIP
日期:	2011
上傳時間:	2012-03-28 10:13:51 (UTC+8)
出版者:	國立中央大學
摘要:	A systematic approach is presented for automatically generating variable-size FFT/IFFT soft intellectual property (IP) cores for MIMO-OFDM systems. The finite-precision effect in an FFT processor is first analyzed, and then an effective word-length searching algorithm is proposed and incorporated in the proposed IP generator. From the comparison, we show that our analysis of the finite precision effect in FFT is much more accurate than the previous work. With the flexible architecture and the effective word-length searching techniques, we can strike a good balance for the performance and the hardware cost of the generated IP cores. The generated FFT soft IP cores are portable and independent of the silicon technology, which helps to greatly reduce the design time. Experimental results demonstrate that the proposed IP generator indeed provides FFT IPs which meet the requirements and are more suitable in recent MIMO-OFDM communication standards/drafts than some conventional FFT IP generators.
關聯:	EURASIP JOURNAL ON ADVANCES IN SIGNAL PROCESSING
顯示於類別:	[電機工程學系] 期刊論文

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