Hardware Implementation of EMD Using DSP and FPGA for Online Signal Processing

NCUIR > College of Electrical Engineering & Computer Science > Department of Electrical Engineering > journal & Dissertation > Item 987654321/52070

Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/52070

Title:	Hardware Implementation of EMD Using DSP and FPGA for Online Signal Processing
Authors:	Lee,MH;Shyu,KK;Lee,PL;Huang,CM;Chiu,YJ
Contributors:	電機工程學系
Keywords:	EMPIRICAL-MODE DECOMPOSITION;FAULT-DIAGNOSIS;ECG
Date:	2011
Issue Date:	2012-03-28 10:14:42 (UTC+8)
Publisher:	國立中央大學
Abstract:	This paper combines a digital signal processor (DSP) and a field programmable gate array (FPGA) to realize the online empirical mode decomposition (EMD)-based signal processing system. The EMD algorithm is a novel signal analysis technique, decomposing signals into a series of intrinsic mode functions. First, the EMD algorithm is implemented in the DSP, named the EMD processor, which has the ability to eliminate noise from the original signal. Next, in order to process the online sequential signal, this paper proposes and implements pipeline and data transfer controllers in the FPGA, called the data processing flow processor. Then, the data processing flow processor coordinates the EMD processor, analog-to-digital converter, and digital-to-analog converter module boards. Finally, this paper presents a prototype of the online EMD-based electrocardiogram denoise system to verify the features of the proposed architecture. The emulations and experimental results demonstrate the effectiveness of the presented system as expected.
Relation:	IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS
Appears in Collections:	[Department of Electrical Engineering] journal & Dissertation

Files in This Item:

File	Description	Size	Format
index.html		0Kb	HTML	470	View/Open

社群 sharing