利用電子迴旋共振化學氣相沉積法成長矽基太陽能電池;Growth of silicon-based solar cells by Electron cyclotron resonance chemical vapor deposition

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題名:	利用電子迴旋共振化學氣相沉積法成長矽基太陽能電池;Growth of silicon-based solar cells by Electron cyclotron resonance chemical vapor deposition
作者:	王漢哲;Wang,Han-Zhe
貢獻者:	光電科學研究所
關鍵詞:	電子迴旋共振;太陽能電池;solar cells;ECR-CVD
日期:	2012-07-30
上傳時間:	2012-09-11 18:40:11 (UTC+8)
出版者:	國立中央大學
摘要:	中文摘要本研究以電子迴旋共振氣相沉積法(ECR-CVD)來討論磊晶矽薄膜沉積於矽基板之同質介面太陽能電池上的應用。ECR-CVD屬於高密度電漿源的薄膜沉積製程設備，主要運用當電子於磁場內受磁力影響做螺旋運動之迴轉角頻率和入射微波共振吸收微波能量撞擊製程氣體解離產生高密度電漿。相較於傳統的PECVD，ECR-CVD有沉積速度快、工作壓力低、較低離子轟擊效應、無電擊汙染…等優勢。本研究將利用ECR-CVD於矽基板沉積高品質磊晶層，相較於傳統單晶矽太陽能電池須以高溫擴散製程或離子佈質方式製作摻雜層，本實驗將以化學氣象沉積方式於低溫(<200℃)製備摻雜層[1]及製作背表面反向電場(BSF)，藉由調變混氣比例、製程溫度、微波功率、薄膜厚度以及前後段製程的改良，沉積20nm有效之p磊晶參雜層於矽基板，此單層結構在無抗反射層下，轉換效率可達8.679%。另外經由背表面電場設計，使薄膜微結構偏向非晶，藉由氫化非晶有較佳表面鈍化效果，成功降低長波光波長所貢獻之少數載子於背表面複合，提高開路電壓和短路電流。實驗結果在在加上抗反射層之平面結構下，可得到太陽能電池轉換效率為(η)=13.67%；開路電壓(Voc)=556.3mV；短路電流(Jsc)=37.18mA；填充因子(FF)=66.07%;而在金字塔結構下可得到太陽能電池轉換效率為(η)=17.69%；開路電壓(Voc)=563.5mV；短路電流(Jsc)=42.36mA；填充因子(FF)=74.12%Abstract This study used Electron cyclotron resonance chemical vapor deposition (ECR-CVD) to discuss epi-Si thin films deposited on silicon substrates of homojunction solar cell applications. ECR-CVD is the high density plasma sources for thin film deposition process equipment. The principle is that electrons under the influence of magnetic fields will do coning motion, when angular frequency and incidence of microwave frequency match each other, it will absorb microwave energy to make gas atom ionization for high density plasma. Compared with PECVD, it has many advantages such as higher deposition rate, lower working pressure, lower ion bombardment effect, and no pollution of electric shock…etc. This study will deposit high quality epi-Si thin film on c-Si substrate by ECR-CVD. Traditionally, monocrystalline silicon solar cells form doping layers with high temperature diffusion process and ion implant. This experiment will prepare emitter layers and the back surface field (BSF) by chemical vapor deposition in very low temperature(< 200 ℃). We deposited 20nm p-type epi-Si layers on the c-Si substrate through modulation of gas mixing ratio, process temperature, microwave power, thin film thickness as well as front and after process improvement. Under this single-layer plane structure without anti-reflective layer, the conversion efficiency is 8.679%. Otherwise, transferring the back surface thin-film micro-structure from microcrystalline to amorphous, we improved open circuit voltage and short-circuit current because of hydrogenated amorphous silicon with better surface passivation reducing minority carrier recombination from long-wavelength photon on back surface. The result with anti-reflection in plane structure have conversion efficiency (η) =13.67%; open circuit voltage (Voc) =556.3mV; short circuit currents (Jsc) =37.18mA ; fill factor (FF) =66.07%. In the pyramid structure, we have conversion efficiency (η) =17.69% open circuit voltage (Voc) =563.5mV; short circuit currents (Jsc) =42.36mA; fill factor (FF) =74.12%.
顯示於類別:	[光電科學研究所] 博碩士論文

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