38-GHz相位天線陣列設計與資料傳輸率提升研究;Design of 38-GHz Phased Antenna Array with Sidelobe Suppression for Data-rate Enhancement

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題名:	38-GHz相位天線陣列設計與資料傳輸率提升研究;Design of 38-GHz Phased Antenna Array with Sidelobe Suppression for Data-rate Enhancement
作者:	陳弘朕;Chen, Hung-Chen
貢獻者:	電機工程學系
關鍵詞:	旁波抑制;相位天線陣列;Sidelobe Suppression;Phased Antenna Array
日期:	2020-01-15
上傳時間:	2020-06-05 17:39:41 (UTC+8)
出版者:	國立中央大學
摘要:	本博士論文在毫米波陣列提出兩種天線設計架構，在第二章中，提出應用於37/39 GHz 頻段的16組串聯饋入毫米波陣列，為了改進串聯饋入陣列天線的阻抗頻寬，使用傳輸線深入微帶貼片天線饋入端調整匹配，並在末端兩個微帶貼片天線採用截角以增加第二個模態。由於微帶貼片天線採用截角會產生橢圓極化，造成交叉極化劣化的影響，因此在陣列的設計上，在兩組串聯饋送陣列間採用鏡對稱排列。由模擬與量測結果驗證對於降低交叉極化確實有顯著改善之效果。16組串聯饋入毫米波陣列實作採用厚度10 mil RO5880作為微波基板。在陣列的後端，結合16個37/39 GHz 主動收/發模組，進行振幅與相位調控，藉以達到低旁波抑制與40度波束掃描涵蓋之功能。由實驗的結果驗證所設計之38 GHz串聯饋入陣列天線，透過振幅與相位補償可達到阻抗頻寬提升到8%、增益21 dBi、旁波抑制25 dB及交叉極化低於20 dB的良好場型特性。本論文在第三章中，探討提出旁波抑制提升技術與旁波抑制對於多波束同時傳輸資料量的影響。在第三章中設計3組應用於37/39 GHz 頻段的毫米波微帶貼面次陣列，每個次陣列包含24組微帶貼片天線，在陣列的後端，結合24個37/39 GHz 主動收/發模組，藉以調控次陣列的場型與掃描方向。為了提高增益、降低波束寬與增加旁波抑制，相較於傳統矩形排列方式，提出空間數量權重優化之鑽石形三角排列方式，此排列方式增加天線有效輻射面積與增加旁波抑制由13 dB改善到17.9 dB。為了進一步改善旁波抑制，採用調適零點的方式，在多波束干擾的方向設計零點抑制旁波干擾。由本文提出的演算法經過模擬與量測驗證可達到旁波抑制35 dB的效果。透過NI的毫米波收/發系統在傳輸量進行有/無旁波抑制的量測比對，量測發現在多波束採用旁波抑制35 dB可達到兩組波束同時傳輸7 Gbps的效果。第四章為本文提出的兩種毫米波陣列之設計結論，後續將朝向毫米波多波束傳輸持續進行精進。 ;In this dissertation, two type millimeter-wave antenna array for Millimetre-wave beamforming applications are presented. In Chapter II, a novel series-fed microstrip patch array antenna for 37/39 GHz beamforming is proposed. To improve the antenna bandwidth, two of the patches are modified with truncated corners in the diagonal direction. This truncation generates two degenerate resonances which result in a flatten frequency response of the input impedance. Then, the recessed microstrip feeds for the other two patches are designed to yield a proper current distribution for radiation while maintaining minimal return loss, wide bandwidth, and low sidelobes. Though the individual patch antenna is elliptically polarized due to the truncated corners, a phased array with linear polarization can still be obtained by alternately deploying left-handed and right-handed elliptically polarized patches. For validation of the proposed design, an array is fabricated with 16 elements on a substrate with 10 mil thickness and r =2.2. The beamforming capability of the proposed array is also demonstrated. The experiment results agree well with the simulation and show that the antenna gain and the return loss bandwidth can be more than 21 dBi and 8%, respectively. The second part of the dissertation focuses on sidelobe suppression for data-rate enhancement. In Chapter III, a design of 38-GHz planar phased patch array with sidelobe suppression for data-rate enhancement is proposed in the paper. The proposed array is formed of three 24-element subarrays of patches. Each patch has its own transmit/receive modules (TRM) consisting of digitally controlled attenuator and phase shifter. In order to achieve high data-rate communications, the noise, especially due to the undesired signals received from the sidelobes, should be reduced with high sidelobe suppression of subarray. The sidelobe suppression of the proposed subarray is first improved to 17.9 dB with a diamond-shaped aperture, and then better than 35 dB with a tapered radiation power distribution. The excellent sidelobe suppression of the antenna array is essential for the beam-division multiplexing applications when the signal sources are close to each other. The proposed design is validated experimentally, including the data-rate measurements showing that the 7-Gbps data transmission can be achieved with sufficient sidelobe suppression of the proposed design. Finally, a summary of the research results and future work are concluded in Chapter IV.
顯示於類別:	[電機工程研究所] 博碩士論文

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