| 摘要: | 在大數據時代中，如何以高速且更效率的搜尋比對極大量資料已是無法迴避的問題，此時三態內容定址記憶體(Ternary Content Addressable Memories, TCAM)，已成不可或缺的重要角色，TCAM因其擁有“Care”與“Don’t care”的功能，能夠適時的免去不必要比對操作，提高搜尋與比對的功效。對於當前基於SRAM電路所設計的揮發性TCAM，存在著較高能耗且單位面積儲存密度低的問題，所以研究利用非揮發性記憶體發展出非揮發性三態內容定址記憶體(Non-volatile Ternary Content Addressable Memories, nv-TCAM)已是必由之逕。
本篇論文利用鐵電電容下電極連接在電晶體閘極端的鐵電閘控電晶體(Ferro-gated MOSFET)設計出2T32C nv-TCAM的架構，該單元電路由一個Control-MOSFET、一個Data-MOSFET和32個金屬-鐵電層-金屬電容(MFM)組成；利用鐵電電容的極化特性改變MOSFET的通道狀態用以控制“Care”與“Don’t care”以及儲存資料。此單元架構中僅使用到兩個電晶體，並透過3D堆疊將鐵電電容以每層2個的方式堆疊16層在電晶體上，提高儲存密度並大幅降低操作功耗。此架構中的鐵電電容是利用埃層級的鐵電材料堆疊在金屬層之中，在實驗結果中，發現其擁有超寬的記憶窗口(4.94V)以及5×10¬¬4的開關比，且每個儲存單元能夠擁有8級的儲存狀態。此外，在性能方面，搜尋時的功耗僅為9.6 μW/b，並且搜尋速度為4.5ns，每個儲存單元的耐久度(Endurance)達到1011次循環，且預測在87.6℃的環境下能達到10年的資料保存時間(Retention)。該設計改善傳統基於SRAM的TCAM
資料易失性的問題，且鐵電電容整合在CMOS製程當中，省下更多的功耗並提高儲存密度，且利用鐵電材料的特性達到多位元儲存狀態的效果，在未來對於搜尋技術上提供一個相當具有競爭力的解決方案。
;In the age of big data, the challenge of efficient and rapid searching and comparing vast amounts of data has become unavoidable. At this point, Ternary Content Addressable Memories (TCAM) have emerged as an indispensable technology. TCAM, with their ability to handle both “Care” and “Don’t care” states, can effectively eliminate unnecessary comparison operations, significantly enhancing efficiency in search and comparison tasks. However, contemporary volatile TCAM, which are primarily based on SRAM circuits, face challenges such as high power consumption and low storage density per unit area. As a result, researchers have begun exploring the development of Non-volatile Ternary Content Addressable Memories (nv-TCAM) utilizing non-volatile memory technologies.
This paper presents a 2T32C nv-TCAM architecture designed using a Ferro-gated MOSFET, where the bottom electrode of the ferroelectric capacitor is connected to the gate terminal of the transistor. The polarization characteristics of the ferroelectric capacitor are utilized to modulate the MOSFET channel state, enabling control over the "Care" and "Don′t care" states, as well as data storage. Notably, the ferroelectric capacitor is constructed using angstrom-level ferroelectric materials stacked within the metal layers.
Experimental results show that this design achieves a memory window of 4.94V, a switching ratio of 5×10⁴, and 8-level storage states per memory cell. In terms of performance, the power consumption during search operations is as low as 9.6 μW/b, with a fast search speed of 4.5 ns. Each memory cell demonstrates an endurance of up to 1011 cycles and a data retention time of 10 years at 87.6°C.
This design resolves the data volatility issues of traditional SRAM-based TCAMs. By integrating ferroelectric capacitors into CMOS fabrication processes, it significantly reduces power consumption and improves storage density. Additionally, the unique properties of ferroelectric materials enable multi-bit storage states, offering a highly competitive solution for future search technology advancements. |
