中大機構典藏-NCU Institutional Repository-提供博碩士論文、考古題、期刊論文、研究計畫等下載:Items for Author
English  |  正體中文  |  简体中文  |  Items with full text/Total items : 78818/78818 (100%)
Visitors : 34728187      Online Users : 1619
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.
Scope Tips:
  • please add "double quotation mark" for query phrases to get precise results
  • please goto advance search for comprehansive author search
    •  Adv. Search
    Home ‧ Login ‧ Upload ‧ Help ‧ About ‧ Administer Goto mobile version

    Category

    Loading community tree, please wait....

    Year

    Loading year class tree, please wait....

    Items for Author "Jou,SJ" 

    Return to Browse by Author

    Showing 12 items.

    Collection Date Title Authors Bitstream
    [電機工程研究所] 期刊論文 2005 Multi-gigabit pre-emphasis design and analysis for serial link Lin,CH; Tsai,CH; Chen,CN; Jou,SJ
    [電機工程研究所] 期刊論文 2003 Low-error reduced-width booth multipliers for DSP applications Jou,SJ; Tsai,MH; Tsao,YL
    [電機工程研究所] 期刊論文 2003 Low-power embedded DSP core for communication systems Tsao,YL; Chen,WH; Tan,MH; Lin,MC; Jou,SJ
    [電機工程研究所] 期刊論文 2001 Intrinsic response for analog module testing using an analog testability bus Su,C; Chen,YT; Jou,SJ
    [電機工程研究所] 期刊論文 2001 Low switching noise and load-adaptive output buffer design techniques Jou,SJ; Kuo,SH; Chiu,JT; Lin,TH
    [電機工程研究所] 期刊論文 2001 Simultaneous switching noise analysis and low-bounce buffer design Jou,SJ; Cheng,WC; Lin,YT
    [電機工程研究所] 期刊論文 1999 Decentralized BIST methodology for system level interconnects Su,CC; Jou,SJ
    [電機工程研究所] 期刊論文 1997 A pipelined multiplier-accumulator using a high-speed, low-power static and dynamic full adder design Jou,SJ; Chen,CY; Yang,EC; Su,CC
    [電機工程研究所] 期刊論文 1997 Hierarchical techniques for symbolic analysis of electronic circuits Jou,SJ; Perng,MF; Su,CC
    [電機工程研究所] 期刊論文 1997 Low-power self-timed circuit design technique Jou,SJ; Chung,IY
    [電機工程研究所] 期刊論文 1996 Parallel event-driven MOS timing simulator on distributed memory multiprocessors Hsieh,WH; Jou,SJ; Su,CC
    [電機工程研究所] 期刊論文 1993 CLEAVAGE FRACTURE UNDER TENSION WITH CONSTRAINT JOU,SJ; CHIOU,SH; TAO,YS; SHEN,WZ

    ::: Copyright National Central University. | 國立中央大學圖書館版權所有 | 收藏本站 | 設為首頁 | 最佳瀏覽畫面: 1024*768 | 建站日期：8-24-2009 :::
    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library IR team Copyright ©   - 隱私權政策聲明