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    Items for Author "梁新聰" 

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    Showing 8 items.

    Collection Date Title Authors Bitstream
    [電機工程學系] 研究計畫 2010-08-01 結合製程變異、良率與佈局考量的前瞻類比積體電路設計自動化系統---子計畫三：良率導向之類比陣列區塊電路自動產生器(I); Yield-Aware Automatic Generator for Analog Regular Array Blocks(I) 陳竹一; 梁新聰
    [電機工程學系] 研究計畫 2011-08-01 良率導向之類比陣列區塊電路自動產生器(II);Yield-Aware Automatic Generator for Analog Regular Array Blocks (Ii) 陳竹一; 梁新聰
    [電機工程學系] 研究計畫 2012-09-01 良率導向之類比陣列區塊電路自動產生器(III);Yield-Aware Automatic Generator for Analog Regular Array Blocks((Iii) 陳竹一; 梁新聰
    [電機工程學系] 研究計畫 2012-12-01 良率導向之類比陣列區塊電路自動產生器(III);Yield-Aware Automatic Generator for Analog Regular Array Blocks((Iii) 陳竹一; 梁新聰
    [電機工程學系] 研究計畫 2013-12-01 良率導向之類比陣列區塊電路自動產生器(IV);Yield-Aware Automatic Generator for Analog Regular Array Blocks (IV) 陳竹一; 梁新聰
    [電機工程學系] 研究計畫 2016-08-31 識別瑕疵分佈均勻性於量產晶圓圖–第一部：黎明在即;Identification of the Defect Uniformity in Volume Production Wafer Maps– Part I: Prior to Dawning 陳竹一; 梁新聰
    [電機工程學系] 研究計畫 2020-12-08 晶圓圖分析的良率和隨機性的理論探索;An Academic Exploration on Interpreting the Yield and Randomness for Wafer Map Analysis 陳竹一; 梁新聰
    [電機工程學系] 研究計畫 2021-12-21 晶圓簽署：在晶圓圖分析中，一個可解釋良率、隨機性和顯著性的自動報告系統;Wm-Signature: an Auto-Report System to Interpret the Yield, Randomness and Salience for Wafer Map Analysis 陳竹一; 梁新聰

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