中大機構典藏-NCU Institutional Repository-提供博碩士論文、考古題、期刊論文、研究計畫等下載:Item 987654321/32466
English  |  正體中文  |  简体中文  |  Items with full text/Total items : 67823/67823 (100%)
Visitors : 23023163      Online Users : 36
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.
Scope Tips:
  • please add "double quotation mark" for query phrases to get precise results
  • please goto advance search for comprehansive author search
  • Adv. Search
    HomeLoginUploadHelpAboutAdminister Goto mobile version


    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/32466


    Title: Built-in redundancy analysis for memory yield improvement
    Authors: Huang,CT;Wu,CF;Li,JF;Wu,CW
    Contributors: 電機工程研究所
    Keywords: RANDOM-ACCESS MEMORY;EMBEDDED RAMS;REPAIR;DRAM;BIST
    Date: 2003
    Issue Date: 2010-07-06 18:28:48 (UTC+8)
    Publisher: 中央大學
    Abstract: With the advance of VLSI technology, the capacity and density of memories is rapidly growing. The yield improvement and testing issues have become the most critical challenges for memory manufacturing. Conventionally, redundancies are applied so that the
    Relation: IEEE TRANSACTIONS ON RELIABILITY
    Appears in Collections:[Graduate Institute of Electrical Engineering] journal & Dissertation

    Files in This Item:

    File Description SizeFormat
    index.html0KbHTML348View/Open


    All items in NCUIR are protected by copyright, with all rights reserved.

    社群 sharing

    ::: Copyright National Central University. | 國立中央大學圖書館版權所有 | 收藏本站 | 設為首頁 | 最佳瀏覽畫面: 1024*768 | 建站日期:8-24-2009 :::
    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library IR team Copyright ©   - Feedback  - 隱私權政策聲明