| 摘要: | 本篇論文主要研究晶片型之Ruthroff型態傳輸線型變壓器的設計，藉由其寬頻、低損耗的特性，成功實現了寬頻高效率的功率放大器及寬頻低損耗的混波器。此外，我們也使用了整合被動元件( Integrated Passive Devices: IPD)的製程，更進一步減少晶片型變壓器的介入損耗及提高射頻電路的效率。本篇論文所呈現的變壓器電路型態一共有兩類，第一類為兩個不平衡轉不平衡(unbalanced-to-unbalanced, un-to-un)型式的變壓器，其阻抗轉換比分別為1:4與1:9；第二類為三個平衡轉不平衡(balanced-to-unbalanced, balun)型式的變壓器，其阻抗轉換比分別為1:4、1:1、及9:4。在1:4與1:9 un-to-un型式的變壓器設計中，皆採用IPD的製程來設計，展現出最低的介入損耗分別為0.5 dB及0.57 dB，其介入損耗1-dB的頻寬百分比分別為175%及140%。另外，也利用覆晶(flip-chip)的封裝技術，垂直整合了CMOS 0.18 m及IPD製程，實現了一個CMOS-IPD的寬頻高效率功率放大器設計，此放大器可達飽和輸出功率26.18 dBm、功率增進效率(power added efficiency: PAE) 47.4%、及33.8%的1-dB頻寬百分比。而在balun型態的變壓器設計中，首次將1:4 Ruthroff型態的balun設計在0.18 m CMOS晶片上，展現出最小的介入損耗約0.71 dB及94.2%的10-dB反射損耗頻寬百分比，同時也應用在單平衡式(single-balanced)混波器的設計上，使得混波器在6 dBm的本地源(LO)驅動下，最低的轉換損耗僅12.48 dB，轉換損耗3-dB的頻寬可涵蓋2.5 GHz到7 GHz。
由於傳統1:4 Ruthroff型態的balun是一種阻抗提升的轉換方式，即其平衡端阻抗是固定高於不平衡端的阻抗，而為了使此寬頻低損耗的balun可應用於CMOS功率放大器中作為功率結合器，我們也使用IPD的技術，設計了兩個修改版Ruthroff型態的balun，此新型態的balun可使平衡端的阻抗低於非平衡端的阻抗，以符合CMOS功率放大器使用上的需求。相較於傳統1:4 Ruthroff型態的balun，其阻抗轉換為由不平衡端的50 ?轉換到平衡端的200 ?，我們所提出的1:1及9:4兩種獨有的型態，不僅可分別執行阻抗轉換由50 ? 轉到50 ?及由50 ? 轉到22.2 ?，同時在平衡端所在的次級繞線上存在虛接地點，可作為好的直流饋入處，使功率放大器設計上可省去射頻扼流圈(RF choke)的使用，進而可提高整體的效率且也有降低晶片面積的優點。在1:1 IPD balun的設計上，展現出最小的介入損耗約0.46 dB及73.2%的10-dB反射損耗頻寬百分比，而在9:4 IPD balun的設計上，展現出的最小介入損耗約0.75 dB，而10-dB的反射損耗頻寬百分比約為52.8%。為了更進一步驗證所提出的balun型態具有直流饋入點的功能，也使用了一個旁路電容及一個直流阻絕電容來取代電路原本直接接地的地方，成功地在IPD晶片上驗證了所提出的1:1及9:4兩種具有直流饋入點功能的balun。量測結果與模擬結果相當接近，在所設計頻段內的特性，具有直流饋入點功能的balun與無需直流饋入功能的balun，也有相近的表現。
This dissertation focuses on the research of on-chip Ruthroff-type transmission-line transformers. By utilizing the broadband and low-loss on-chip Ruthroff-type transformers, a wideband and high-efficiency power amplifier and a wideband low-loss passive mixer were successfully achieved. Besides, The Integrated Passive Devices (IPD) technology was utilized to further reduce the insertion loss of the transformers and to improve the efficiency of RF circuits. In this dissertation, two types of transformers are presented. The first type is two unbalanced-to-unbalanced (un-to-un) transformers with the impedance transformation ratio of 1:4 and 1:9, respectively. The other type is three balanced-to-unbalanced (balun) transformers with impedance transformation ratio of 1:4, 1:1 and 9:4, respectively. The 1:4 and 1:9 un-to-un transformers were fabricated using IPD process. They exhibit the minimum insertion losses of 0.5 dB and 0.57 dB and the correspondent 1-dB fractional bandwidths of 175% and 140%, respectively. Moreover, utilizing the flip-chip package technology, a CMOS-IPD PA produced using vertical heterogeneous integration of standard 0.18 m CMOS technology and IPD technology was fabricated with an output power of 26.18 dBm, a PAE of 47.4%, and the 1-dB fractional bandwidths of 33.8%. In the balun type of transformers, the 1:4 Ruthroff-type balun was first designed using standard 0.18 m CMOS technology with a minimum insertion loss of 0.71 dB and the 10-dB return loss fractional bandwidths of 94.2% which is defined as the in-band return loss exceeds 10 dB. Utilizing the broadband and low-loss characteristics of Ruthroff-type balun, a simple single-balanced mixer with the balun demonstrates a minimum conversion loss of 12.48 dB with a 3-dB bandwidth from 2.5 to 7 GHz while the LO drive of 6 dBm.
The 1:4 Ruthroff-type balun is an impedance step-up balun whose balanced impedance is higher than that of the unbalanced one. For utilizing Ruthroff-type balun as a broadband and low-loss power combiner in CMOS power amplifiers, two new modified Ruthroff-type baluns with step-down impedance transformation, whose balanced impedance is lower than that of unbalanced one, were developed using IPD technology. Compared with 1:4 Ruthroff-type baluns which transfers the impedance from 50 ? to 200 ?, the proposed 1:1 and 9:4 baluns not only perform the impedance transformation from 50 ? to 50 ? and from 50 ? to 22.2 ?, respectively, but also have the center tap at the secondary winding of balanced ports. A power amplifier with a balun of having a center tap at the balanced winding can obviate the need of RF choke, which could improve the efficiency of power amplifier and reduce the chip area and cost. The proposed 1:1 balun exhibits an insertion loss of 0.46 dB with the 10-dB returned loss fractional bandwidths of 73.2%, and the proposed 9:4 balun exhibits an insertion loss of 0.75 dB with the 10-dB returned loss fractional bandwidths of 52.8%. To further verify the function of the proposed balun with a center tap, the testkeys of 1:1 and 9:4 baluns using a bypass capacitor and a DC block capacitor as ac ground were also developed using IPD technology. The measured results have good agreements with the simulations and show that the in-band performances of the balun with a center tap are close to those of the balun without additional capacitors. |
