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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/65596

    Title: 物件偵測嵌入式硬體加速器設計與實作;Design and Implementation of Hardware Accelerator for Embedded Object Detection
    Authors: 陳泓霖;Chen,Hung-lin
    Contributors: 資訊工程學系
    Keywords: 軟硬體共同設計
    Date: 2014-07-11
    Issue Date: 2014-10-15 17:05:57 (UTC+8)
    Publisher: 國立中央大學
    Abstract: 在現今機器視覺系統多以SoC嵌入式軟硬體整合方法設計,使用FPGA取代多個DSP模組。在傳統的開發中,通常依據需求先設計軟體雛型,接著再將某些模組硬體化,達成軟硬體共同設計之系統。硬體模組多以連續串流進行設計,然而這種方法較缺乏彈性,當需求只要小小改變時,整個硬體模組可能就不適用需要重新規劃。
    ;In recent years, most of the machine vision systems use embedded hardware and software co-design, which uses FPGA to replace some DSP modules. In traditional development, we first design software prototype and then choose some modules that designed by hardware. We use a series designed to connect this hardware modules to compose hardware architecture. However, this type of architecture lacks flexibility. If system requirements just need to do a little change, the architecture need to whole redesign.
    In this thesis, we propose embedded vision hardware and software co-design methodology. Firstly, we analyze the system requirements with IDEF0. This way is analysis whole system hierarchically and divided into many modules. Secondly, we use Grafcet establish discrete event model for every modules. Then we through the way of Grafcet synthesis to produce software code and hardware design. This development approach needs not coding in prophase of system design. Additionally, we design a hardware interface controller, which is suitable in hardware and software co-design architecture. This controller contains all of hardware modules, and designers can select desired target modules according to system requirements which include efficacy, elasticity, cost, and power consumption. It is not necessary to redesign hardware architecture, the designer just to change the order of hardware modules through software. The hardware interface controller can increased development flexibility, and accelerate the system development process.
    Appears in Collections:[資訊工程研究所] 博碩士論文

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