English  |  正體中文  |  简体中文  |  全文筆數/總筆數 : 78937/78937 (100%)
造訪人次 : 39423441      線上人數 : 300
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.
搜尋範圍 查詢小技巧:
  • 您可在西文檢索詞彙前後加上"雙引號",以獲取較精準的檢索結果
  • 若欲以作者姓名搜尋,建議至進階搜尋限定作者欄位,可獲得較完整資料
  • 進階搜尋


    請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/65839


    題名: 氧化鋁/砷化銦鰭式場效電晶體之製作與特性分析;Fabrication and Characterization of Al2O3/InAs Fin Field-Effect Transistors
    作者: 謝承軒;Hsieh,Cheng-hsuan
    貢獻者: 電機工程學系
    關鍵詞: 砷化銦;氧化鋁;金屬氧化物半導體電容;鰭式場效電晶體;InAs;Al2O3;MOSCAP;FinFET
    日期: 2014-08-27
    上傳時間: 2014-10-15 17:11:34 (UTC+8)
    出版者: 國立中央大學
    摘要: 砷化銦化合物半導體因其具備低能隙、高電子遷移率與高電子飽和速度,被視為低耗能電晶體的通道層材料選項之一,此三-五族材料的鰭狀電晶體架構,在未來有相當高的機會被應用在積體電路中。然而,目前高介電常數材料與三-五族半導體間的界面缺陷多寡是影響元件特性最關鍵的問題,因此,本論文中將提出適當地砷化銦表面處理方式,開發奈米級砷化銦鰭式場效電晶體,並探討其元件特性。
      本研究是以原子層沉積法成長的氧化鋁作為高介電常數材料,並於成長前藉由不同化學溶液對砷化銦的表面進行處理,同時搭配金屬沉積後的退火處理,修復氧化鋁與氧化鋁/砷化銦界面缺陷,最終提出一個合適的表面清理與熱退火處理方式,有效降低氧化鋁/砷化銦界面缺陷密度和氧化層缺陷密度。
      製作鰭式場效電晶體所使用之試片是以分子束磊晶法所成長,以砷化鎵為基板,銻化物為緩衝層及砷化銦為通道層。鰭式場效電晶體的製程技術開發包括:以電子束微影系統進行鰭式通道、歐姆接觸與閘極區域的定義,過程包含微影劑量、光阻形貌與金屬沉積後的形貌開發,同時引入BCB平坦化製程,解決奈米級元件的接觸窗口不易形成的問題。最後,本研究成功利用電子束微影技術開發出閘極長度為0.5 μm、源極至汲極距離為2 μm與有效鰭式通道寬度為60 nm之砷化銦表面通道鰭式場效電晶體。其元件之最大汲極電流密度為119 μA/μm,最大轉導值為77.2 μS/μm,臨界電壓為-2.37 V,汲極電流開關比為136以及次臨界擺幅為524 mV/decade。;Because of its narrow band gap, high electron mobility and high electron saturation velocity, InAs is considered a promising candidate for low power consumption field-effect transistors (FETs). Its fin field-effect transistors (FinFETs) might be used in the integrated circuits in the future. However, the interface traps at high-κ/III-V interface, which have significant negative influence on device performance, must be reduced before it can be used for practical applications. In this work, methods of surface treatment for InAs are studied. Nano-scale InAs FinFETs are also demonstrated and characterized.
      Al2O3 prepared by atomic layer deposition is used as the high-κ material in this study. Before the deposition, various chemical treatments on InAs surface and post metallization annealed are investigated. A proper treatment is proposed to minimize the interface trap density and oxide trap density.
      The InAs surface channel epi-wafers are grown on GaAs substrates with an Sb-based buffer layer by molecular beam epitaxy. The channel width, ohmic area and gate profile of the FinFETs are defined by electron-beam lithography. The effects of electron beam dosage on photoresist profile and metal profile are examined in this study. Benzocyclobutene planarization process is also employed in this nano-scale device. Al2O3/InAs FinFETs with a gate length of 0.5 μm, source to drain separation of 2 μm and fin width of 60 nm are successfully fabricated. A maximum drain current of 119 μA/μm, a maximum transconductance of 77.2 μS/μm, a threshold voltage of -2.37 V, a drain current on-off ratio of 136 and a sub-threshold swing of 524 mV/decade are obtained.
    顯示於類別:[電機工程研究所] 博碩士論文

    文件中的檔案:

    檔案 描述 大小格式瀏覽次數
    index.html0KbHTML616檢視/開啟


    在NCUIR中所有的資料項目都受到原著作權保護.

    社群 sharing

    ::: Copyright National Central University. | 國立中央大學圖書館版權所有 | 收藏本站 | 設為首頁 | 最佳瀏覽畫面: 1024*768 | 建站日期:8-24-2009 :::
    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library IR team Copyright ©   - 隱私權政策聲明