本論文中利用不同金屬層彼此交換作為補償，並且確保每一條電阻間的導線都具有相同的水平與垂直金屬層分配(IC-level channel routing)、相同的VIA區塊、一致的電阻連接形式。接著我們以電阻陣列對角的繞線路徑為基準，並將所有的繞線路徑延伸至等長，且同時開發一個圖型使用者介面(GUI)工具，提供使用者做繞線資訊的設定。佈局完成後再透過calibre軟體來驗證寄生阻值的一致性。 ;Because of the progress of the semiconductor process technology, the process variation will be more and more serious in device mismatch and wire parasitic. In addition, analog circuit design increase time-consuming and complex, so a reliable automation tool will become the key point to enhance the efficiency of the overall circuit design.
For the series resistor array in resistor-string DAC, we can effectively reduce the random error by the permutation and space correlation of resistors. However, the high precision resistor string and resistor array permutation will increase the difficulty of the physical layout, and the inconsistency of the parasitic resistance will cause the circuit system error. Therefore, a good arrangement can not be achieved in the physical layout automation and balance parasitic effects, it will eventually fall short. In other words, the automated routing and interconnect resistance balance has already indispensable.
In this thesis, we get the compensation by exchanging two layer and ensure that each resistor connected wires having the same layer distribution, the same number of VIA block, and the consistent connection form. Then we stretch all routing paths to the same total length. The standard of length is the diagonal routing path. While developing a graphical user interface (GUI) tool, it can provide users to set routing information, bit number, and type clearly. Finally, we balanced the parasitic resistance by calibre.
