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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/72100


    Title: 隨機缺陷分布之晶圓圖分析;Wafer Map Analysis from Random Distributed Defects
    Authors: 蕭寶威;Hsiao,Bao-Wei
    Contributors: 電機工程學系
    Keywords: 晶圓;Wafer Map
    Date: 2016-07-07
    Issue Date: 2016-10-13 14:26:19 (UTC+8)
    Publisher: 國立中央大學
    Abstract: 產品量產之良率( Yield )高低與成本有著密不可分的關係,隨著進入奈米時代,顯現的晶圓瑕疵圖樣更加多變,由瑕疵數的分解比例透過等比例的累積運算,觀察晶圓圖受到不同比例之瑕疵密度影響。
    本文提出一種以泊松良率為基礎,以晶圓圖故障晶粒數( NBD )和故障晶粒群聚方向數( NCD )兩項特徵化函數為觀察座標,以最符合現實晶圓圖所顯示的情況,觀察兩項特徵比值座落在座標位置。
    對隨機均勻產生瑕疵之晶圓圖觀察其NBD和NCD之分布現象,並提出軍刀特徵圖,修正過去提出之平均瑕疵數,以達到更符合實際晶圓圖的模型,利用NBD和NCD的比例分析,分析NBD與NCD之間的關係,並以已分類之瑕疵晶圓圖做更深入的分析以及驗證。
    在本實驗中,我們使用迴力棒特徵圖與軍刀特徵圖做驗證,透過觀察特徵圖形來找出損壞晶粒的群聚情形以及位置,檢視其瑕疵分布的均勻性。再以未被分類的晶圓圖驗證特徵圖的實用性,進而達到提高良率、測試效率以及降低成本的目的。
    ;Mass production of the yield (Yield) and low cost has a close relationship, with the entry of nanometer era, appearing wafer defect patterns more volatile, the decomposition ratio of the number of defects accumulate operations through equal proportions observed crystal chart subject to different proportions of defect density influence.
    This paper presents a Poisson yield as the basis, the number of grains fault wafer map (NBD) clustering and fault grain direction number (NCD) is a function of two characteristics observed coordinates, the most realistic of the wafer map show observe two features located in the ratio of the coordinate position.
    Ratio analysis of randomly generated uniformly observed defects in the wafer map NBD and NCD distribution of the phenomenon and proposed saber feature map correction average number of flaws in the past, proposed, in order to achieve more in line with actual wafer map model, the use of NBD and NCD analyze the relationship between NBD and NCD, and defect wafer maps of classified do more in-depth analysis and verification.
    In this experiment, we use the boomerang feature map feature map do with saber verified by observing feature pattern to identify damaged grain flocking situation and the location, view the uniformity of its flaws. And then to verify the practicality feature map Not classified wafer map, and thus to improve yield, test efficiency and reduce costs.
    Appears in Collections:[Graduate Institute of Electrical Engineering] Electronic Thesis & Dissertation

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