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    請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/72182


    題名: 應用於生理訊號偵測之可調式增益與頻寬讀取電路;A Design of Read-out Circuit with Programmable Gain and Bandwidth for Bio-signal Detection
    作者: 陳雅雯;Chen,Ya-Wen
    貢獻者: 電機工程學系
    關鍵詞: 低雜訊類比前端電路;可調式增益放大器;虛擬電阻;弱反轉區;Low-noise Bioamplifier;Programmable gain Bioamplifier;Pseudo-resistor;Subthreshold Region
    日期: 2016-07-21
    上傳時間: 2016-10-13 14:30:51 (UTC+8)
    出版者: 國立中央大學
    摘要: 隨著無線傳輸技術純熟與網際網路的普及,使得可攜帶的電子產品成為主流,近年來更搭配應用於日常生理訊號的監控與醫療照護,透過感測器偵測人體心跳、肌力等數據,再將數據傳輸至不同的系統介面,但是因為生理訊號極微小,為了能夠完整的放大訊號並應用於可攜式裝置,因此電路設計需朝向低雜訊、低功耗等目標。
    本文實現一應用於生理訊號偵測的類比前端放大電路,電路架構採用AC coupling的方式,阻絕電極貼片所造成的直流偏移電壓,電路中將電晶體操作於弱反轉區以降低功耗與雜訊,且利用可調式的虛擬電阻形成低頻極點,並針對不同的生理訊號可選擇適當的增益與頻寬,避免電路發生飽和的情況。
    本文採用台積電TN90GUTM CMOS 1P9M 製程實現電路,晶片面積約占0.437 mm2(包含Pad),電源供應電壓為1 V,整體電路功耗約8.96 μW(包含偏壓電路),應用頻寬為10 KHz,為了固定輸出訊號大小以利於後端電路的設計,因此當輸入訊號為不同的振幅時,可透過電路中的可調增益放大器將訊號放大至相同的振幅大小,為此當輸入訊號各別為0.3 mV、0.5 mV、1 mV 且頻率皆為250Hz時,為配合達到相同的輸出振幅大小,整體放大器增益各別須為57.6、53.2、47.3 dB,低頻截止頻率點為12.2 Hz,輸入雜訊為20.5 μVrms,雜訊效率因素(NEF)為20.98。;With the popularity of the wireless transmission technology and the Internet, the portable electronic products are the mainstream in the market. In recent years, the portable products with the bio-signal acquisition have been applied in daily monitoring and healthcare. Through the sensor detects the heartbeat, muscle and other data of the human, then transmit the bio-signal data to different system interfaces. In order to completely amplify the tiny bio-signal and apply in portable devices, the circuit design is required to be low noise and low power consumption.
    This thesis presents a design of read-out circuit for bio-signal detection. AC coupling structure is employed to block the DC offset which is caused by the electrode. The MOS operates in weak inversion to reduce noise and power consumption. Besides, the circuit uses the pseudo resistor to achieve the low-cutoff frequency pole, and also affords programmable gain and bandwidth for different bio-signal to avoid the saturation situation.
    The circuit is implemented by TSMC TN90GUTM CMOS 1P9M process and the chip area is 0.437 mm2 (including the PAD). Power consumption is about 8.96 μW for 1 V power
    supply (bias circuit is included) and application bandwidth is 10 KHz. When the input signal frequency is 250Hz, the gain of the circuit can achieve 57.6、53.2、47.3 dB in three different amplitudes (0.3 mV, 0.5 mV, 1 mV). The low-cutoff frequency pole is 12.2 Hz. The input-referred noise is 20.5 μVrms (11 Hz – 10 KHz) and the NEF is 20.98.
    顯示於類別:[電機工程研究所] 博碩士論文

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