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    Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/72255


    Title: 應用單向化預失真、傳輸型變壓器與二元功率結合技術於C/X頻段之寬頻全積體功率放大器之研製;Implementations on C/X-band Wideband Fully Integrated Power Amplifiers with Unilateralized Pre-distortion, Transmission Line Transformer and Binary Power Combiner Techniques
    Authors: 林佳慧;Lin,Jia-Hui
    Contributors: 電機工程學系
    Keywords: 功率放大器;傳輸型變壓器;單向化;預失真;二元功率結合;Power Amplifiers;Transmission Line Transformer;unilateralization;Pre-distortion;Binary Power Combiner
    Date: 2016-08-22
    Issue Date: 2016-10-13 14:35:05 (UTC+8)
    Publisher: 國立中央大學
    Abstract: 本論文利用WIN 0.25-µm GaN pHEMT和tsmcTM 0.18-µm製程設計功率放大器,在設計上以操作於C/X頻段功率放大器為主要目標。應用傳輸線型變壓器和T型傳輸線型匹配達到寬頻且低損耗的特性,以及利用功率結合提升輸出功率。電路架構採用交錯耦合單向化電容來抑制閘-汲寄生電容(Cgd)所產生的米勒效應(Miller Effect),進而提升電路的傳輸增益(|S21|)和穩定度,並使用預失真技術來改善電路的線性度,來實現高增益和高線性度之寬頻功率放大器。
      各電路特性量測如下 : 應用並聯匹配網路結合功率於X頻段之寬頻功率放大器,傳輸增益為16.2 dB,飽和輸出功率為25.3 dBm,1-dB增益壓縮點輸出功率為24.8 dBm,3-dB頻寬為6.7GHz (4.6-11.3 GHz),比例頻寬為84.3 %,晶片面積為3.3 (2.075×1.587) mm2;應用傳輸線型變壓器、預失真技術與單向化技術於C/X頻段之寬頻功率放大器,傳輸增益為25.2 dB,飽和輸出功率為21.9 dBm,最佳功率附加增益為19.3 %,1-dB增益壓縮點輸出功率為17.2 dBm,1-dB增益壓縮點的功率附加增益最高可達17.2 %,小訊號增益之3-dB頻寬為 7.8 GHz (4.6-12.4 GHz),比例頻寬為91.8 %,飽和輸出功率之1-dB頻寬為5.0 GHz (5.5-10.5 GHz),晶片面積為1.95×0.81 mm2。

    ;Both C-band and X-band fully integrated power amplifiers (PA) are designed in this thesis, which are fabricated in WINTM 0.25-µm GaN pHEMT and tsmcTM 0.18-µm CMOS Processes. A PA with wideband, high gain and high linearity adopted differential Guanella-type transmission-line transformers (DTLTs) and T-type transmission-line matching is designed to achieve broadband and low loss, and adopted power combine to enhance output power. The capacitive neutralization technique is adopted to mitigate the Miller effect to improve power gain and enhance stability. The linearity at back-off region is enhanced by predistortion technique. High gain and high linearity of the broadband amplifier are thus implemented.
      The measurement results of the first PA shows a power gain of 16.2 dB, a saturated output power of 25.3 dBm, an output 1-dB gain compression point of 24.8 dBm. The 3-dB bandwidth is from 4.6 to 11.3 GHz, and the fractional bandwidth is 84.3 %. The chip size is 3.3 (2.075×1.587) mm2. The second PA achieves a power gain of 25.2 dB, a saturated output power of 21.9 dBm, a maximum power added efficiency of 19.3 %, an output 1-dB gain compression point of 17.2 dBm with power added efficiency of 17.2 %. The 3-dB bandwidth is from 4.6 to 12.4 GHz. The 3-dB bandwidth of saturation power is from 5.5 to 10.5 GHz. The chip area is 1.95×0.81 mm2.
    Appears in Collections:[電機工程研究所] 博碩士論文

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