基於全通網路與鐵電可變電容之阻抗調制器;An Impedance Tuner Based on All-Pass Networks and Ferroelectric Varactors

NCUIR > College of Electrical Engineering & Computer Science > Graduate Institute of Electrical Engineering > Electronic Thesis & Dissertation > Item 987654321/75964

Please use this identifier to cite or link to this item: http://ir.lib.ncu.edu.tw/handle/987654321/75964

Title:	基於全通網路與鐵電可變電容之阻抗調制器;An Impedance Tuner Based on All-Pass Networks and Ferroelectric Varactors
Authors:	劉俊良;Liou, Jyun-Liang
Contributors:	電機工程學系
Keywords:	阻抗調制器;鐵電可變電容;全通網路;Impedance tuner;Ferroelectric varactors;All-pass networks
Date:	2018-01-30
Issue Date:	2018-04-13 11:24:46 (UTC+8)
Publisher:	國立中央大學
Abstract:	本論文使用全通網路設計相位偏移器和可調變壓器，並結合兩者來實現一阻抗調制器。使用此架構，我們可分別調制相位偏移器與可調變壓器，以獨立控制反射係數之相位與大小。與常見的Π型或T型可調匹配網路相較，本論文提出之阻抗調制器架構具有操作方式直觀且方便的優點，適合應用於可適性匹配系統之中。本論文提出之阻抗調制器由兩級相位偏移器和一級可調變壓器組成，皆基於全通網路結構。阻抗調制器之操作頻率設計於2.45 GHz；設計流程描述於論文中。全通網路中的電容是以本實驗室開發的鐵電可變電容來實現，電感則使用商用0201表面黏著電感元件。模擬結果顯示，當鐵電可變電容具2.2的可調度時，設計之阻抗調制器可提供之最大的VSWR為4.83，並可以提供360°的阻抗涵蓋範圍於史密斯圖上。在阻抗涵蓋範圍內，阻抗調制器的dissipation loss為2至13.5 dB。所提出之阻抗調制器使用本實驗室所開發的製程來製作於藍寶石基板上；本製程可製作的元件包括鐵電薄膜可變電容及本實驗室首度整合進電路的矽化鉻薄膜電阻。製作出之阻抗調制器，其量測結果顯示最大的VSWR僅達2.33，且無法提供360°之阻抗涵蓋範圍。我們推測這是由於鐵電可變電容在偏壓提高後就有較大的漏電流及較低的Q值，使得電容可調度、相移器之相移量和可調變壓器可達到之VSWR皆有所下降。我們將量測到的測試電容值和Q值帶回電路重新模擬，並降低可調度，重新模擬後可較貼近量測結果。本論文展現出全通網路用於實現阻抗調制器之潛力，並是本實驗室首次使用矽化鉻薄膜來實現偏壓電阻，大幅降低了電路面積。 ;In this thesis, phase shifter and variable transformer are designed using all-pass networks (APNs) and combined to realize an impedance tuner. With the proposed architecture, we can independently control the phase and magnitude of the reflection coefficient by separately adjusting the phase shifter and the variable transformer. Compared with the common Π- or T-shaped tunable matching networks, the proposed impedance tuner architecture exhibits the advantage of straightforward and convenient way of operation, which is good for adaptive matching system application. The proposed impedance tuner consists of a two-stage phase shifter and a one-stage variable transformer, both of which are based on APNs. The impedance tuner is designed to operate at 2.45 GHz. Design procedures and considerations are described. The capacitors within the APNs are realized by ferroelectric varactors developed in our lab, whereas the inductors are commercially available 0201 surface mount devices. Simulation results show that, when the ferroelectric varactors exhibit a tunability of 2.2, the designed impedance tuner is able to provide a maximum VSWR of 4.83 and a full 360° impedance coverage over the Smith Chart. Within the impedance coverage, the dissipation loss ranges from 2 to 13.5 dB. The proposed impedance tuner is realized on a sapphire substrate using a fabrication process developed by our lab. The fab process offers ferroelectric thin-film varactor and CrSi2 thin-film resistor. In this work, the CrSi2 thin-film resistor is, for the first time in our lab, used in an integrated circuit. Measurement results of the fabricated impedance tuner show that the maximum VSWR is 2.33 and full 360° impedance coverage is not achieved. We suspect that the reason for the degraded performance is the higher leakage current and lower quality factor of the ferroelectric varactors as the bias voltage increases, which leads to lower varactor tunability, less phase shift, and reduced maximum achievable VSWR. In the re-simulation, measured capacitances and quality factors of test varactors are used and lower varactor tunability values are assumed. It is found that the re-simulation results fit better to the measured results. In this work, we demonstrate the potential of using APNs for realizing impedance tuners and, for the first time in our lab, realize bias resistors in an integrated circuit with CrSi2 thin film, which leads to a much smaller circuit area.
Appears in Collections:	[Graduate Institute of Electrical Engineering] Electronic Thesis & Dissertation

Files in This Item:

File	Description	Size	Format
index.html		0Kb	HTML	209	View/Open

社群 sharing

Loading...