用於改進測試的時變製造過程的疊代估計;Iterative Estimation of Time-Variant Manufacturing Processes for Test Improvement

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题名:	用於改進測試的時變製造過程的疊代估計;Iterative Estimation of Time-Variant Manufacturing Processes for Test Improvement
作者:	葉宗皇;Yeh, Chung-Huang
贡献者:	電機工程學系
关键词:	測試錯誤;測試規格;測試防護帶;缺陷等級;Test errors;test specification;guardband test;defect level
日期:	2020-07-22
上传时间:	2020-09-02 18:23:54 (UTC+8)
出版者:	國立中央大學
摘要:	這項研究以統計方法為基礎，開發一種IC測試模型（DITM），用來評估IC產品的測試良率和品質。為了清楚地表示製造和測試參數，我們將製造能力（DUT電路特性參數）以常態分佈為基礎，然後依次表達與製造能力和測試能力相關的其他參數的標準化參數。最後，我們使用品質-良率圖來了解可製造性參數與可測試性參數之間的相互作用。由於無法得知IC產品的未來分佈，因此我們使用當前產品的電氣特性和產品製造技術來估算未來的產品分佈趨勢。我們比較了Miao–Dalal，DITM和ITRS預測的未來不同的Yt (Test Yield)值。在這三種不同的估計方法之間，很明顯，由以上模擬結果可以清楚了解，DITM可以準確有效地預測未來測試良率Yt。由於測試技術的開發改進速度相當緩慢，因此對於testing house來說，使用現有測試儀器和適當的測試方法，分類出高品質的優質IC已成為一個更大的挑戰。為了提高產品測試良率與品質，我們提出了幾種重複測試的新方案（多重測試方法，重複測試方法和不平衡測試方法），以獲得具有所需產品品質的最大測試良率，這是通過應用《國際半導體技術路線圖》（ITRS）表中的重複測試方法來完成的。最後，通過將重複測試方法應用於2015年ITRS路線圖中的預估的表格中，可以清楚地看出，與傳統測試方法相比，重複測試確實可以將測試結果提高30％以上或更多。;This study aims to develop an IC testing model (DITM) based on a statistical simulation method to evaluate the test yield and quality of IC products. In order to express the manufacturing and testing parameters clearly, we will take the manufacturability (DUT circuit characteristic parameters) into a standard normal distribution as the basis, and then successively express the standardized parameters of other parameters relative to manufacturability and testability. Finally, we use the quality-yield plot to demonstrate the interaction between the manufacturability parameters and the testability parameters. Since the future distribution of IC products cannot be known, we use current product electrical characteristics and product manufacturing technology to estimate future product distribution trends. Hence, we compared the different future test yield (Yt) values as predicted by Miao–Dalal Yield, DITM, and by ITRS. Between the three different estimation methods, it is clear that the above-simulated result indicated that DITM could accurately and effectively predict future test yield (Yt). Since developmental improvements for testing technologies has been slow, it has become a greater challenge for a supplier to determine the use of existing instruments and tools to achieve quality products with zero defects. To improve product quality, several new schemes of duplicate tests (Multiple test method, Repeated test method, and Unbalanced test method) have been proposed to obtain a maximum yield with the desired qualities. This has been done by applying the duplicate testing methodologies described in Table of the International Technology Roadmap for Semiconductors (ITRS). Finally, with the application of the Repeat test methodology to the table of the test protocol described in the 2015 ITRS Roadmap, it shows clearly that in comparison with the traditional test methodology, Repeat testing can indeed promote the result of test yield by 30% or more.
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