應用於 n79 頻段之使用連續B類技術單端互補式金氧半導體堆疊式功率放大器暨差動緊耦合變壓器與差動緊湊型磁耦合變壓器之互補式金氧半導體堆疊式功率放大器研製;Implementations on n79-band CMOS Single-ended Stacked Power Amplifier with Continuous Class-B Mode Techniques and Differential CMOS Stacked Power Amplifiers with Tightly Coupled Transformer and Differential CMOS Compact Stacked Power Amplifiers with Coupled Transformer

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Title:	應用於 n79 頻段之使用連續B類技術單端互補式金氧半導體堆疊式功率放大器暨差動緊耦合變壓器與差動緊湊型磁耦合變壓器之互補式金氧半導體堆疊式功率放大器研製;Implementations on n79-band CMOS Single-ended Stacked Power Amplifier with Continuous Class-B Mode Techniques and Differential CMOS Stacked Power Amplifiers with Tightly Coupled Transformer and Differential CMOS Compact Stacked Power Amplifiers with Coupled Transformer
Authors:	陳怡璇;Chen, Yi-Hsuan
Contributors:	電機工程學系
Keywords:	第五代行動通訊;互補式金氧半導體;連續模式技術;差動電路;磁耦合變壓器;緊耦合變壓器;緊湊電路;增益拓展效應;功率放大器;CMOS;broadband;continuous Class-B mode;differential mode;coupled transformer;tightly coupled transformer;compact;gain expansion;power amplifier
Date:	2023-07-20
Issue Date:	2023-10-04 16:09:27 (UTC+8)
Publisher:	國立中央大學
Abstract:	本論文介紹三顆應用於第五代行動通訊之n79頻段的功率放大器，皆使用tsmcTM 0.18-m互補式金氧半導體設計堆疊式功率放大器。三顆晶片皆完成實作與量測，包含量測散射參數、大信號操作以及使用5G NR FR1調變訊號進行調變量測，並針對各晶片之量測結果進行模擬設計與量測探討。第二章提出應用於 n79 頻段之使用連續B類技術單端堆疊式功率放大器，為了使本設計電路具有較佳的抗諧波干擾能力，於輸出匹配網路採用連續 B 類技術設計，以抑制二倍頻諧波量，並藉由所挑選電晶體之偏壓點，抑制三階項諧波所對基頻項造成的增益壓縮現象。成功使功率放大器在大信號操作下，於增益壓縮1-dB時之輸出功率與輸出飽和功率的量測結果相近，擁有良好的線性輸出功率。最大量測傳輸增益為14.15 dB，大信號量測結果顯示頻帶內飽和輸出功率為21至21.5 dBm，效率為12.1至14.45%，而增益壓縮1-dB時之輸出功率為20.27至20.86 dBm，晶片面積為2.58 mm2。調變訊號量測使用100 MHz 256QAM之訊號在輸入功率為5 dBm 的功率等級下使用DPD，改善EVM由3.15%至1.65%，ACPR從-27.61/-32.20 dBc改善至-30.06/-37.77 dBc，輸出峰值功率為21.04 dBm。第三章首先提出應用於n79 頻段之差動緊耦合變壓器堆疊式功率放大器，透過使用磁耦合變壓器將兩個功率單元的結合，並透過差動電路結構，減少寄生輸出電容、提升輸出阻抗以利匹配至系統阻抗。於輸出匹配網路設計緊耦合變壓器，提高其傳輸效率，亦挑選抑制三階項諧波之電晶體偏壓點，以減少諧波對電路的影響。最大量測傳輸增益為15.22 dB。大信號量測結果顯示頻帶內飽和輸出功率為21.82至23.55 dBm，效率為8至10.22%，而增益壓縮1-dB時之輸出功率為14.1至20.7 dBm，晶片面積為3.79 mm2。調變訊號量測使用100 MHz 256QAM之訊號，在輸入功率為9 dBm的功率等級下使用DPD，量測結果顯示，本電路設計的抗干擾能力佳，不需要使用DPD，在不使用DPD下，於輸入功率為9 dBm 時，輸出峰值功率為22.1 dBm、EVM 為3.3%。同時於第三章提出應用於n79 頻段之差動緊湊型變壓器堆疊式功率放大器，級間匹配網路採用中央抽頭電感，為雙端轉雙端信號的磁耦合變壓器，並針對輸出匹配網路作優化調整，採用平行耦合佈局，縮減其長度而減少損耗，進而提高Q值，以優化輸出巴倫器的傳輸效率，成功將差動耦合變壓器堆疊式功率放大器緊縮為2.57 mm2晶片面積。最大量測傳輸增益為12.3 dB。大信號量測結果顯示頻帶內飽和輸出功率為21.8至22.6 dBm，效率為8至9.8%，而增益壓縮1-dB時之輸出功率為19.8至20.7 dBm。調變訊號量測使用100 MHz 256QAM之訊號在輸入功率為6 dBm 的功率等級下使用DPD，改善EVM由4至2.7%，ACPR從-24.49/-30.88 dBc改善至-30.31/-39.2 dBc，輸出峰值功率為21.5 dBm。;The thesis developed three power amplifiers that were designed in tsmcTM 0.18-μm complementary metal oxide semiconductor (CMOS) processes for 5th generation communication system applications. Chapter 2 presents an n79-band CMOS single-ended stacked power amplifier with continuous class-B mode techniques. In order to improve harmonic interference characteristics in this designed circuit, continuous class-B technique is used in the output matching network to suppress the second harmonic distortion. By selecting the bias point, the gain compression caused by the third-order harmonic is suppressed, resulting in a power amplifier that maintains linear output power when operating with large signals, with the measured output power at 1-dB gain compression point being close to the output saturation power. The maximum measured gain is 14.15 dB, and the saturated output power within the frequency band ranges from 21 dBm to 21.5 dBm, with an efficiency of 12.1% to 14.45%. The output power at 1-dB gain compression is from 20.27 dBm to 20.86 dBm. The chip area is 2.58 mm2. Modulation signal measurements were performed using a 100 MHz 256QAM signal with an input power level of 5 dBm. Digital Predistortion (DPD) was applied, improving the EVM from 3.15% to 1.65%, and the ACPR from -27.61/-32.20 dBc to -30.06/-37.77 dBc, with an output peak power of 21.04 dBm. In Chapter 3, a differential tightly coupled transformer stacked power amplifier for the n79 frequency band is proposed. By using magnetic-coupled transformers to combine two power cells, and the output parasitic capacitance of the power cells is reduced, the output impedance is double, and the better matching to the system is achieved. A tightly coupled transformer is designed for the output matching network to improve transmission efficiency, and transistor bias points that suppress the third-order harmonic are selected to mitigate the impact of harmonics on the circuit. The maximum measured gain is 15.22 dB. The saturated output power within the frequency band ranges from 21.82 dBm to 23.55 dBm, with an efficiency of 8% to 10.22%. The output power at 1-dB gain compression is from 14.1 dBm to 20.7 dBm. The chip area is 3.79 mm2. Modulation signal measurements were performed using a 100 MHz 256QAM signal with an input power level of 9 dBm. DPD was applied, and the measurement results showed that the tightly coupled circuit has good resistance to interference in the modulation signal, eliminating the need for DPD. Without DPD, at an input power of 9 dBm, the output peak power reached 22.1 dBm with an EVM of 3.3%. Additionally, Chapter 3 also presents a differential compact transformer-stacked power amplifier for the n79 frequency band is proposed. The inter-stage matching network uses a center-tapped inductor, which is a balnced-to-balanced magnetic-coupled transformer. The output matching network is optimized using parallel coupling layout to reduce the length of metal trace, minimize loss, and thus increase the Q factor, thereby improving the transmission efficiency of the output balun. The differential coupled transformer-stacked power amplifier is compacted to a chip area of 2.57 mm2. The maximum measured gain is 12.3 dB. The saturated output power within the frequency band ranges from 21.8 dBm to 22.6 dBm, with an efficiency of 8% to 9.8%. The output power at 1-dB gain compression is from 19.8 dBm to 20.7 dBm. Modulation signal measurements were performed using a 100 MHz 256QAM signal with an input power level of 6 dBm. DPD was applied, improving the EVM from 4% to 2%.
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