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| 題名: | Hardware Implementation of EMD Using DSP and FPGA for Online Signal Processing |
| 作者: | Lee,MH;Shyu,KK;Lee,PL;Huang,CM;Chiu,YJ |
| 貢獻者: | 電機工程學系 |
| 關鍵詞: | EMPIRICAL-MODE DECOMPOSITION;FAULT-DIAGNOSIS;ECG |
| 日期: | 2011 |
| 上傳時間: | 2012-03-28 10:14:42 (UTC+8) |
| 出版者: | 國立中央大學 |
| 摘要: | This paper combines a digital signal processor (DSP) and a field programmable gate array (FPGA) to realize the online empirical mode decomposition (EMD)-based signal processing system. The EMD algorithm is a novel signal analysis technique, decomposing signals into a series of intrinsic mode functions. First, the EMD algorithm is implemented in the DSP, named the EMD processor, which has the ability to eliminate noise from the original signal. Next, in order to process the online sequential signal, this paper proposes and implements pipeline and data transfer controllers in the FPGA, called the data processing flow processor. Then, the data processing flow processor coordinates the EMD processor, analog-to-digital converter, and digital-to-analog converter module boards. Finally, this paper presents a prototype of the online EMD-based electrocardiogram denoise system to verify the features of the proposed architecture. The emulations and experimental results demonstrate the effectiveness of the presented system as expected. |
| 關聯: | IEEE TRANSACTIONS ON INDUSTRIAL ELECTRONICS |
| 顯示於類別: | [電機工程學系] 期刊論文
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