中大機構典藏-NCU Institutional Repository-提供博碩士論文、考古題、期刊論文、研究計畫等下載:Item 987654321/29261
English  |  正體中文  |  简体中文  |  全文笔数/总笔数 : 66984/66984 (100%)
造访人次 : 23032273      在线人数 : 135
RC Version 7.0 © Powered By DSPACE, MIT. Enhanced by NTU Library IR team.
搜寻范围 查询小技巧:
  • 您可在西文检索词汇前后加上"双引号",以获取较精准的检索结果
  • 若欲以作者姓名搜寻,建议至进阶搜寻限定作者字段,可获得较完整数据
  • 进阶搜寻


    jsp.display-item.identifier=請使用永久網址來引用或連結此文件: http://ir.lib.ncu.edu.tw/handle/987654321/29261


    题名: A 2-V 7.2 degrees jitter AM-suppression CMOS amplifier using current-mode hybrid magnitude control
    作者: Huang,KH;Wang,WC;Yang,TH;Wang,CK
    贡献者: 電機工程研究所
    关键词: LIMITING AMPLIFIER
    日期: 1999
    上传时间: 2010-06-29 20:20:17 (UTC+8)
    出版者: 中央大學
    摘要: This paper proposes an AM-suppression CMOS amplifier that incorporates a discrete-level automatic gain control (AGC) with a hysteresis hard limiter in order to reduce magnitude-dependent jitter and speed up AM-suppression response. The gain control that is composed of a transition-based magnitude controller and a discrete-level current-mode variable gain amplifier (VGA) does not require coherent detection and external components. The prototype amplifier demonstrates a jitter of 7.2 degrees from 1-Mb/s pulse-point modulated (PPM) data input with 20-dB dynamic range (40-400 mV(pp)), which is six times improvement over the conventional limiter alone approach, The amplifier with an active area of 0.64 mm(2) is implemented in 0.8-mu m single-poly double-metal digital CMOS technology. It consumes 18 mW from a single 2-V supply.
    關聯: IEEE JOURNAL OF SOLID-STATE CIRCUITS
    显示于类别:[電機工程研究所] 期刊論文

    文件中的档案:

    档案 描述 大小格式浏览次数
    index.html0KbHTML393检视/开启


    在NCUIR中所有的数据项都受到原著作权保护.

    社群 sharing

    ::: Copyright National Central University. | 國立中央大學圖書館版權所有 | 收藏本站 | 設為首頁 | 最佳瀏覽畫面: 1024*768 | 建站日期:8-24-2009 :::
    DSpace Software Copyright © 2002-2004  MIT &  Hewlett-Packard  /   Enhanced by   NTU Library IR team Copyright ©   - 回馈  - 隱私權政策聲明